ASM2I99448

Features: ` 12 LVCMOS compatible clock outputs` Selectable LVCMOS and differential LVPECL compatible clock inputs` Maximum clock frequency of 350MHz` Maximum clock skew of 150pS` Synchronous output stop in logic low state eliminates output runt pulses` Highimpedance output control` 3.3V or 2.5V po...

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ASM2I99448 Picture
SeekIC No. : 004288953 Detail

ASM2I99448: Features: ` 12 LVCMOS compatible clock outputs` Selectable LVCMOS and differential LVPECL compatible clock inputs` Maximum clock frequency of 350MHz` Maximum clock skew of 150pS` Synchronous output ...

floor Price/Ceiling Price

Part Number:
ASM2I99448
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/1/2

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Product Details

Description



Features:

` 12 LVCMOS compatible clock outputs
` Selectable LVCMOS and differential LVPECL compatible clock inputs
` Maximum clock frequency of 350MHz
` Maximum clock skew of 150pS
` Synchronous output stop in logic low state eliminates output runt pulses
` Highimpedance output control
` 3.3V or 2.5V power supply
` Drives up to 24 series terminated clock lines
` Ambient temperature range 40°C to +85°C
` 32Lead LQFP & TQFP packaging
` Supports clock distribution in networking, telecommunication and computing applications
` Pin and Function compatible to MPC9448 and MPC948



Pinout

  Connection Diagram


Specifications

Symbol
Parameter
Min
Max
Unit
VCC
Supply Voltage
-0.3
3.9
V
VIN
DC Input Voltage
-0.3
VCC + 0.3
V
VOUT
DC Output Voltage
-0.3
VCC + 0.3
V
IIN
DC Input Current
±20
mA
IOU
DC Output Current
±50
mA
Tstor
Storage Temperature Range
-65
125
Note: 1. These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability.


Description

The ASM2I99448 is a 3.3V or 2.5V compatible, 1:12 clock fanout buffer targeted for high performance clock tree applications. With output frequencies up to 350 MHz and output skews less than 150 pS, the device meets the needs of most demanding clock applications.

The ASM2I99448 is specifically designed to distribute LVCMOS compatible clock signals up to a frequency of 350MHz. Each output provides a precise copy of the input signal with a near zero skew. The outputs buffers support driving of 50 terminated transmission lines on the incident edge: each output is capable of driving either one parallel terminated or two series terminated transmission lines.

Two selectable, independent clock inputs are available,  providing support of LVCMOS and differential LVPECL  clock distribution systems. The ASM2I99448 CLK_STOP control is synchronous to the falling edge of the input clock. ASM2I99448 allows the start and stop of the output clock signal only in a logic low state, thus eliminating potential output runt pulses. Applying the OE control will force the outputs into highimpedance mode.

All inputs of ASM2I99448 have an internal pullup or pulldown resistor preventing unused and open inputs from floating. The device supports a 2.5V or 3.3V power supply and an ambient temperature range of 40°C to +85°C. The ASM2I99448 is pin and function compatible but performanceenhanced to the MPC948.




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