Features: ·Access Times: 12, 15, & 20ns· Fast output enable (tDOE) for cache applications· Low active power: 400 mW (TYP)· Low power standby· Fully static operation, no clock or refresh required· High-performance, low-power CMOS double-metal proces· Single +5V (±10%) Power Supply· Easy memory ...
AS5C2568: Features: ·Access Times: 12, 15, & 20ns· Fast output enable (tDOE) for cache applications· Low active power: 400 mW (TYP)· Low power standby· Fully static operation, no clock or refresh required...
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Features: · Access times of 15, 20 and 25 ns·Fast output enable (tAOE ) for cache applications· Lo...
The Austin Semiconductor SRAM family employs high-speed, low power CMOS designs using a four-transistor memory cell. These SRAMs AS5C2568 are fabricated using double-layer metal, double-layer polysilicon technology.
For flexibility in high-speed memory applications, Aus-tin Semiconductor offers chip enable (CE\) and output enable (OE\) capability. These enhancements can place the outputs in High-Z for additional flexibility in system design.
Writing to AS5C2568 is accomplished when write enable (WE\) and CE\ inputs are both LOW. Reading is accom-plished when WE\ remains HIGH and CE\ and OE\ go LOW.The device offers a reduced power standby mode when dis-abled. AS5C2568 allows system designs to achieve low standby power requirements.
AS5C2568 operate from a single +5V power supply and all inputs and outputs are fully TTL compatible.