ARM7TDMI™

Features: • 32-bit RISC Architecture• Two Instruction Sets: ARM® High-performance 32-bit Instruction Set Thumb® High-code-density 16-bit Instruction Set• Very Low Power Consumption: Industry-leader in MIPS/Watt• 4G Bytes Linear Address Space• Von Neumann Load...

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SeekIC No. : 004288034 Detail

ARM7TDMI™: Features: • 32-bit RISC Architecture• Two Instruction Sets: ARM® High-performance 32-bit Instruction Set Thumb® High-code-density 16-bit Instruction Set• Very Low Power Co...

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Part Number:
ARM7TDMI™
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

• 32-bit RISC Architecture
• Two Instruction Sets: ARM® High-performance 32-bit Instruction Set Thumb® High-code-density 16-bit Instruction Set
• Very Low Power Consumption: Industry-leader in MIPS/Watt
• 4G Bytes Linear Address Space
• Von Neumann Load/Store Architecture: Single 32-bit Data Bus for Instructions and Data
• 3-Stage Pipeline Architecture: Fetch, Decode and Execute Stage
• 8-, 16-, and 32-bit Data Types
• Single Cycle 32x8 Hardware Multiplier: Multiplication is Accelerated when Upper Bytes Are All Zero or One
• On-chip JTAG Debug and In Circuit Emulation
• Extensive Range of Third-party Application Development Tools



Description

The ARM7TDMI™ embedded microcontroller core is a member of the AdvancedRISC Machines (ARM®) family of general purpose 32-bit microprocessors, which offerhigh performance and very lower power consumption. ARM7TDMI™ outstanding feature is the16-bit Thumb® subset of the most commonly used 32-bit instructions. These areexpanded at run time with no degradation of system performance. ARM7TDMI™ gives 16-bitcode density (saving memory area and cost) coupled with 32-bit processorperformance.

The ARM ARM7TDMI™architecture is based on Reduced Instruction Set Computer (RISC) princi-ples, and the instruction set and related decode mechanism are much simpler thanthose of microprogrammed Complex Instruction Set Computers. ARM7TDMI™ simplicity resultsin a high instruction throughput and impressive real-time interrupt response from asmall and cost-effective chip.

Pipelining ARM7TDMI™ is employed so that all parts of the processing and memory systems canoperate continuously. Typically, while one instruction is being executed, its successoris being decoded, and a third instruction is being fetched from memory.

The ARM ARM7TDMI™memory interface has been designed to allow the performance potential tobe realized without incurring high costs in the memory system. Speed-critical controlsignals are pipelined to allow system control functions to be implemented in standardlow-power logic, and these control signals facilitate the exploitation of the fast localaccess modes offered by industry standard dynamic RAMs.

The ARM ARM7TDMI™memory interface is also ideally suited to interfacing, either on-chip or off-chip, with Atmel's Flash memory blocks. These give the benefits of in-system pro-grammability and security, reducing time-to-market and system cost.

The ARM7TDMI core is supported by an extensive range of application developmenttools. These are fully described in the AT91Business Partners section of Atmels'sWeb site (www.atmel.com).




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