ARINC 429

      The ARINC 429  is a two-wire, point-to-point data bus that is  application-specific for  commercial and transport aircraft. The connection wires are twisted pairs. Words are 32 bits in length and most messages consist of a single data word. The specification defines the electrical standard and data characteristics and protocols. ARINC 429 uses a unidirectional data bus standard (Tx and Rx are on separate ports) known as the Mark 33 Digital Information Transfer System (DITS). Messages are transmitted at 12.5, 50 (optional), or 100 kbps to other system elements that are monitoring the bus messages. The transmitter is always transmitting either 32-bit data words or the Null state.  The ARINC standard supports High, Low, and Null states (Figure 2). A minimum of four Null bits should be transmitted between ARINC words. No more than 20 receivers can be connected to a single bus (wire pair) and no less than one receiver, though there will normally be more.
      Supports ARINC Specification 429-16, Configurable up to 16 Rx and 16 Tx Channels, Programmable FIFO Depth(Up to 512 Words), Programmable Interrupt Generation(Rx and Tx Channels independently; Up to 64 Words), Internal, Wrap-Around Testing, Software Compatible with Legacy Devices, Configurable Label Memory Size(Rx and Tx Channels independently; Up to 256 Words), Selectable Data Rate on Each Channel(12.5 100 kbps; Optional 50 kbps), ARINC 429 Bus Interface(Supports Standard Line Drivers and Receivers), Available as Integrated Tx and Rx.
      The ARINC 429 provides a complete Transmitter (Tx) and Receiver (Rx). A typical system implementation using Core429 is shown in Figure 1. The core consists of three main blocks: Transmit, Receive, and CPU Interface (Figure 1). Core429 requires connection to an external CPU. The CPU interface configures the transmit and receive control registers and initializes the label memory.  The core interfaces to the ARINC 429 bus through an external ARINC 429 line driver and line receiver. A detailed description of the Rx interface and Tx interface is provided in the "Functional Description" section on page 5.