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AP2302

Features: · Support Both DDR I (1.25VTT) and DDR II (0.9VTT) Requirements· Source and Sink Current up to 3A· High Accuracy Output Voltage at Full-load· Adjustable VOUT by External Resistors· Shutdown for Standby or Suspend Mode Operation with High-impedance OutputApplication· DDR-SDRAM Termination...

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SeekIC No. : 004286272 Detail

AP2302: Features: · Support Both DDR I (1.25VTT) and DDR II (0.9VTT) Requirements· Source and Sink Current up to 3A· High Accuracy Output Voltage at Full-load· Adjustable VOUT by External Resistors· Shutdow...

AP2302 Data Sheet

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Part Number:
AP2302
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/25

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Product Details

Description



Features:

· Support Both DDR I (1.25VTT) and DDR II
  (0.9VTT) Requirements
· Source and Sink Current up to 3A
· High Accuracy Output Voltage at Full-load
· Adjustable VOUT by External Resistors
· Shutdown for Standby or Suspend Mode
  Operation with High-impedance Output


Application

· DDR-SDRAM Termination
· DDR-II Termination
· SSTL-2 Termination


Pinout

Connection Diagram


Specifications

Parameter Symbol Value Unit
Supply Voltage for Internal Circuit VCNTL 7 V
Power Dissipation PD Internally Limited W
ESD (Human Body Model) ESD 2 KV
Junction Temperature TJ 150
Storage Temperature Range TSTG -65 to 150
Lead Temperature (Soldering, 10sec) TLEAD 260
Package Thermal Resistance (Free Air) JA SOIC-8 160 /W
TO-252-5 130
TO-263-5L 90
Note 1: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated
under "Recommended Operating Conditions" is not implied. Exposure to "Absolute Maximum Ratings" for extended periods
may affect device reliability.


Description

The AP2302 linear regulator is designed to meet the JEDEC specification SSTL-2 and SSTL-18 for termination of DDR-SDRAM. The regulator can sink or source up to 3A current continuously, offers enough current for most DDR applications. Output voltage is designed to track the reference voltage within a 2% (DDR I) and 3% (DDR II) tolerance for load regulation while preventing shooting through on the output stage. On-chip thermal limiting provides protection against a combination of high current and ambient temperature which would create an excessive junction temperature.

The AP2302, used in conjunction with series termination resistors, provides an excellent voltage source for active termination schemes of high speed transmission lines as those seen in high speed memory buses and distributed backplane designs.




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