AM26LS32

Features: • Four Independent Receiver Chains• ThreeState Outputs• High Impedance Output Control Inputs (PIA Compatible)• Internal Hysteresis 30 mV (Typical) @ Zero Volts Common Mode• Fast Propagation Times 25 ns (Typical)• TTL Compatible• Single 5.0 V Su...

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SeekIC No. : 004282087 Detail

AM26LS32: Features: • Four Independent Receiver Chains• ThreeState Outputs• High Impedance Output Control Inputs (PIA Compatible)• Internal Hysteresis 30 mV (Typical) @ Zero Volts Com...

floor Price/Ceiling Price

Part Number:
AM26LS32
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/7/15

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Product Details

Description



Features:

• Four Independent Receiver Chains
• ThreeState Outputs
• High Impedance Output Control Inputs
   (PIA Compatible)
• Internal Hysteresis 30 mV (Typical) @ Zero Volts Common Mode
• Fast Propagation Times 25 ns (Typical)
• TTL Compatible
• Single 5.0 V Supply Voltage
• FailSafe InputOutput Relationship. Output Always High When Inputs
   Are Open, Terminated or Shorted
• 6.0 k Minimum Input Impedance



Pinout

  Connection Diagram


Specifications

 

Rating

Symbol

Value

Unit

Power Supply Voltage

VCC

7.0

Vdc

Input Common Mode Voltage

VICM

± 25

Vdc

Input Differential Voltage

VID

± 25

Vdc

ThreeState Control Input Voltage

VI

7.0

Vdc

Output Sink Current

IO

50

mA

Storage Temperature

Tstg

65 to + 150

°C

Operating Junction Temperature

TJ

+ 150

°C




Description

Motorola4s Quad EIA422/3 Receiver features four independent receiver hains which comply with EIA Standards for the Electrical Characteristics of Balanced/Unbalanced Voltage Digital Interface Circuits. AM26LS32 outputs  are 74LS compatible, threestate structures which are forced to a high impedance state when Pin 4 is a Logic "0" and Pin 12 is a Logic "1." A PNP device buffers each output control pin to assure minimum loading for either Logic "1" or Logic "0" inputs. In addition, each AM26LS32 chain has internal hysteresis circuitry to improve noise margin and discourage output instability for slowly changing input waveforms.


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