AM24LC04

Features: • State- of- the- art architecture- Non-volatile data storage- Standard voltage and low voltage operation (Vcc = 2.7V to 5.5V) for AM24LC04• 2-wire I2C serial interface- Provides bi-directional data transfer protocol• 16-byte page write mode- Minimizes total write time ...

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AM24LC04 Picture
SeekIC No. : 004282040 Detail

AM24LC04: Features: • State- of- the- art architecture- Non-volatile data storage- Standard voltage and low voltage operation (Vcc = 2.7V to 5.5V) for AM24LC04• 2-wire I2C serial interface- Provid...

floor Price/Ceiling Price

Part Number:
AM24LC04
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/23

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Product Details

Description



Features:

• State- of- the- art architecture
- Non-volatile data storage
- Standard voltage and low voltage operation (Vcc = 2.7V to 5.5V) for AM24LC04
• 2-wire I2C serial interface
- Provides bi-directional data transfer protocol
• 16-byte page write mode
- Minimizes total write time per word
• Self-timed write-cycle (including auto-erase)
• Durable and Reliable
- 40 years data retention
- Minimum of 1M write/erase cycles per word
- Unlimited read cycles
- ESD protection
• Low standby current
• Packages: PDIP-8L, SOP-8L, TSSOP-8L



Pinout

  Connection Diagram


Specifications

Characteristics Symbol Values Unit
Storage Temperature TS -65 to + 125 °C
Voltage with Respect to Ground   -0.3 to + 6.5 V
Note: These are STRESS rating only. Appropriate conditions for operating these devices given elsewhere may permanently damage the part. Prolonged exposure to maximum ratings may affect device reliability.


Description

The AM24LC04 is a non-volatile, 4096-bit serial EEPROM with conforms to all specifications in I2C 2 wire protocol. The whole memory can be disabled (Write Protected) by connecting the WP pin to Vcc. This section of memory then becomes unalterable unless WP is switched to Vss.

The AM24LC04 communication protocol uses CLOCK(SCL) and DATA I/O(SDA) lines to synchronously clock data between the master (for example a microcomputer)and the slave EEPROM devices(s) .In addition, the bus structure allows for amaximum of 16K of EEPROM memory. AM24LC04 supports the family in 2K, 4K, 8K devices, allowing  the user to configure the memory as the application requires with any combination of EEPROMs (not to exceed 16K). Anachip EEPROMs are designed and tested for application requiring high endurance, high reliability, and low power consumption.




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