Description
Features:
• Low threshold voltage of 0.7V
• Low input capacitance
• Low Vos grades -- 2mV, 5mV, 10mV
• High input impedance -- 1012W typical
• Low input and output leakage currents
• Negative current (IDS) temperature coefficient
• Enhancement-mode (normally off)
• DC current gain 109
Application
• Precision current mirrors
• Precision current sources
• Analog switches
• Choppers
• Differential amplifier input stage
• Voltage comparator
• Data converters
• Sample and Hold
• Analog inverter
Specifications
Drain-source voltage, VDS 13.2V
Gate-source voltage, VGS 13.2V
Power dissipation 500 mW
Operating temperature range PA, SA package 0°C to +70°C
DA package -55°C to +125°C
Storage temperature range -65°C to +150°C
Lead temperature, 10 seconds +260°C
Description
The ALD1102 is a monolithic dual P-channel matched transistor pair intended for a broad range of analog applications. These enhancementmode transistors are manufactured with Advanced Linear Devices' enhanced ACMOS silicon gate CMOS process.
The ALD1102 offers high input impedance and negative current temperature coefficient. The transistor pair is matched for minimum offset voltage and differential thermal response, and it is designed for switching and amplifying applications in +2V to +12V systems where low input bias current, low input capacitance and fast switching speed are desired. Since these are MOSFET devices, they feature very large (almost infinite) current gain in a low frequency, or near DC operating environment. When used with an ALD1101, a dual CMOS analog switch can be constructed. In addition, the ALD1102 is intended as a building block for differential amplifier input stages, transmission gates, and multiplexer applications.
The ALD1102 is suitable for use in precision applications which require very high current gain, beta, such as current mirrors and current sources.The high input impedance and the high DC current gain of the Field Effect Transistors result in extremely low current loss through the control gate. The DC current gain is limited by the gate input leakage current, which is specified at 50pA at room temperature. For example, DC beta of the device at a drain current of 5mA at 25°C is = 5mA/50pA = 100,000,000.