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AL4CS221

Features: · 512 x9-bit cell array (AL4CS211)· 1,024 x9-bit cell array (AL4CS221)· 2,048 x9-bit cell array (AL4CS231)· 4,096 x9-bit cell array (AL4CS241)· 8,192 x9-bit cell array (AL4CS251)· 100/133 MHz Operation· 10/7.5 ns read/write cycle time· Independent Read and Write operations· Empty and Ful...

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SeekIC No. : 004279634 Detail

AL4CS221: Features: · 512 x9-bit cell array (AL4CS211)· 1,024 x9-bit cell array (AL4CS221)· 2,048 x9-bit cell array (AL4CS231)· 4,096 x9-bit cell array (AL4CS241)· 8,192 x9-bit cell array (AL4CS251)· 100/133 ...

AL4CS221 Data Sheet

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Part Number:
AL4CS221
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

·  512 x9-bit cell array (AL4CS211)
·  1,024 x9-bit cell array (AL4CS221)
·  2,048 x9-bit cell array (AL4CS231)
·  4,096 x9-bit cell array (AL4CS241)
·  8,192 x9-bit cell array (AL4CS251)
·  100/133 MHz Operation
·  10/7.5 ns read/write cycle time
·  Independent Read and Write operations
·  Empty and Full flags support
·  Programmable Almost-Empty and Almost-Full flags
·  Output enable (data skipping)
·  3.3V power supply with 5V tolerant
·  Available in a 32-pin Thin Quad Flat Pack (TQFP) and 32-pin plastic leaded chip carrier (PLCC) packages


Application

·  Routers
·  ATM switches
·  Cable modems
·  Wireless base stations
·  SONET(Synchronous Optical Network) multiplexers
·  Multimedia systems
·  Time base correction (TBC)


Pinout

Connection Diagram


Specifications

Symbol
Parameter
3.3V Rating
Unit
VDD
 Supply Voltage
-0.3 ~ +3.8
V
VP
 Pin Voltage
-0.3 ~ +(VDD+0.3)
V
IO
 Output Current
-20 ~ +20
mA
TAMB
 Ambient Op. Temperature
0 ~ +85
°C
Tstg
 Storage temperature
-40 ~ +125
°C



Description

The AL4CS211/AL4CS221/AL4CS231/AL4CS241/AL4CS251 series memory products are highperformance,low-power 9-bit read/write FIFO (First-In-First-Out) memory chips. They are specially designed to buffer high speed streaming data for a wide range of communication applications, such as optical disk controllers, Local Area Networks (LANs), SONET (Synchronous Optical Network).

The input data is synchronous with a free-running clock (WCLK), and input-enable pins (/WEN1,/WEN2). Data of AL4CS211/AL4CS221/AL4CS231/AL4CS241/AL4CS251 is written into the FIFO on every clock when enable pins are asserted. The output is synchronous with the other free-running clock (RCLK) and enables (/REN1, /REN2). An Output Enable pin (/OE) is provided at the read port for tri-state control of the output port. The FIFOs can output two fixed flags, Empty Flag( /EF) and Full Flag (/FF), and two programmable flags, Almost- Empty (/PAE) and Almost-Full (/PAF). The offsets of the /PAE and /PAF flags are loaded when Load pin (/LD) goes low.




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