AK6480A

Features:

ADVANCED CMOS EEPROM TECHNOLOGY
Wide Vcc (1.8V ~ 5.5V) operation
AK6420A ` ` 2048 bits: 128 ´ 16 organization
   AK6440A ` ` 4096 bits: 256 ´ 16 organization
   AK6480A ` ` 8192 bits: 512 ´ 16 organization
ONE CHIP MICROCOMPUTER INTERFACE
   Interface with one chip microcomputer's serial communication port directly
LOW POWER CONSUMPTION
   0.75mA Max (Read operation)
   0.8mA Max (Standby mode)
HIGH RELIABILITY
   Endurance : 100K cycles
   Data Retention : 10 years
SPECIAL FEATURES
   High speed operation ( fMAX=1MHz: Vcc=2.5V )
   Automatic write cycle time-out with auto-ERASE
   Automatic address increment (READ)
   Ready/Busy status signal
   Software and Hardware controlled write protection
IDEAL FOR LOW DENSITY DATA STORAGE
   Low cost, space saving, 8-pin package (SOP, SSOP)


Pinout




Specifications




Description

The AK6420A/40A/80A is a 2048/4096/8192bit, serial, read/write, non-volatile memory device fabricated using an advanced CMOS EEPROM technology. The AK6420A has 2048bits of memory organized into 128 registers of 16 bits each. The AK6440A has 4096bits of memory organized into 256 registers of 16 bits each. The AK6480A has 8192bits of memory organized into 512 registers of 16 bits each. The AK6420A/40A/80A can operate full function under wide operating voltage range from 1.8V to 5.5V. The charge up circuit is integrated for high voltage generation that is used for write operation.
The AK6420A/40A/80A can connect to the serial communication port of popular one chip microcomputer directly (3 line negative clock synchronous interface). At write operation, AK6420A/40A/80A takes in the write data from data input pin (DI) to a register synchronously with rising edge of input pulse of serial clock pin (SK). And at read operation,AK6420A/40A/80A takes out the read data from a register to data output pin (DO) synchronously with falling edge of SK.
The AK6420A/40A/80A has 4 instructions such as READ, WRITE, WREN (write enable) and WRDS (write disable).
Each instruction is organized by op-code block (8bits), address block (8bits) and data (8bits ´ 2). When input level of
SK pin is high level and input level of chip select (CS) pin is changed from high level to low level, AK6420A/40A/80A can receive the instructions.
Special features of the AK6420A/40A/80A include : automatic write time-out with auto-ERASE, Ready/Busy status
signal output and ultra-low standby power mode when deselected (CS=high).
· Software and Hardware controlled write protection
The AK6420A/40A/80A has 2 (hardware and software) write protection functions.
After power on or after execution of WRDS (write disable) instruction, execution of WRITE instruction will be disabled.
This write protection condition continues until WREN instruction is executed or Vcc is removed from the part.
Execution of READ instruction is independent of both WREN and WRDS instructions.
Reset pin should be low level when WRITE instruction is executed. When the Reset pin is high level, the WRITE
instruction is not executed.
· Ready/Busy status signal
During the automatic write time-out period (BUSY status), the AK6420A/40A/80A can't accept the other instructions.
The AK6420A/40A/80A has 2 functions to know the Busy status from exterior.
The RDY/BUSY pin indicates the Busy status regardless of the CS pin status. The RDY/BUSY pin outputs the low level regardless of the CS pin status during Busy status. Except the above status, this pin outputs high level.
Also the DO pin indicates the Busy status. When input level of SK pin is low level and input level of CS pin is changed
from high level to low level, the AK6420A/40A/80A is in the status output mode and the DO pin indicates the
Ready/Busy status. The Ready/Busy status outputs on DO pin until CS pin is changed from low level to high level, or
first bit ("1") of op-code of next instruction is given to the part. Except when the device is in the status output mode or outputs data, the DO pin is in the high impedance state.