Features: · SERIAL DIGITAL INTERFACE· 48-LEAD SSOP PACKAGE· E1, T1 AND SDSL OPERATION· 64kbps TO 1168kbps OPERATION· SCALEABLE DATA RATE· 250mW POWER DISSIPATION PER CHANNEL· TWO COMPLETE HDSL ANALOG INTERFACES· +5V POWER (5V or 3.3V Digital)PinoutSpecificationsAnalog Inputs: Current ................
AFE2124: Features: · SERIAL DIGITAL INTERFACE· 48-LEAD SSOP PACKAGE· E1, T1 AND SDSL OPERATION· 64kbps TO 1168kbps OPERATION· SCALEABLE DATA RATE· 250mW POWER DISSIPATION PER CHANNEL· TWO COMPLETE HDSL ANALO...
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Burr-Brown's dual Analog Front End chip greatly reduces the size and cost of a DSL (Digital Subscriber Line) system by providing all of the active analog circuitry needed to connect two digital signal processors to external compromise hybrids and line transformers. The AFE2124 is optimized for HDSL (High bit rate DSL) and for SDSL (symmetrical DSL) applications. Because the transmit and receive filter responses automatically change with clock frequency, the AFE2124 is particularly suitable for multiple rate DSL systems. The device operates over a wide range of data rates from 64kbps to 1168kbps. Functionally, each half of this unit consists of a transmit and a receive section. The transmit section generates analog signals from 2-bit digital symbol data and filters the analog signals to create 2B1Q symbols.
The onboard differential line driver provides a 13.5dBm signal to the telephone line. The receive section filters and digitizes the symbol data received on the telephone line. This AFE2124 IC operates on a single 5V supply. The digital circuitry in the unit can be connected to a supply from 3.3V to 5V. AFE2124 is housed in a 48-lead SSOP package.