ADS5240

· Maximum Sample Rate: 40MSPS
· 12-Bit Resolution
· No Missing Codes
· Power Dissipation: 607mW
· CMOS Technology
· Simultaneous Sample-and-Hold 
· 70.5dBFS SNR at 10MHz IF
· Internal and External References
· 3.3V Digital/Analog Supply
· Serialized LVDS Outputs
· Integrated Frame and Bit Patterns
· MSB and LSB First Modes
· Option to Double LVDS Clock Output Currents
· Pin- and Format-Compatible Family
· HTQFP-64 PowerPAD. Package

The ADS5240 is a high-performance, 4-channel, 40MSPS analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size.

An integrated phase lock loop multiplies the incomingbf9  ADC sampling clock by a factor of 12. This 12x clock is used in the process of serializing the data output from each channel. The 12x clock is also used to generate a 1x and a 6x clock, both of which are transmitted as LVDS clock outputs. The 6x clock is denoted by the differential pair LCLK_P and LCLK_N, while the 1x clock is denoted by ADCLK_P and ADCLK_N. The word output of each ADC channel can be transmitted either as MSB or LSB first. The bit coinciding with the rising edge of the 1x clock output  is the first bit of the word. Data of ADS5240 is to be latched by the receiver on both the rising and falling edges of the 6x  clock.

The ADS5240 provides internal references, or can  optionally be driven with external references. Best performance can be achieved through the internal  reference mode. The device is available in an HTQFP-64 PowerPAD  Package package and is specified over a -40°C to +85°C operating range.