Features: · Single +3.3V Supply· High SNR: 61.7dBFS at fIN = 5MHz· Total Power Dissipation: Internal Reference: 366mW External Reference: 330mW· Internal or External Reference· Low DNL: ±0.1LSB· Flexible Input Range: 1.5VPP to 2VPP· TQFP-64 PackageApplication· Communications IF Processing· Communi...
ADS5237: Features: · Single +3.3V Supply· High SNR: 61.7dBFS at fIN = 5MHz· Total Power Dissipation: Internal Reference: 366mW External Reference: 330mW· Internal or External Reference· Low DNL: ±0.1LSB· Fle...
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ADS5237 |
UNIT | |
Supply voltage range, AVDD Supply voltage range, VDRV Voltage between AVDD and VDRV Voltage applied to external REF pins Analog input pins(2) Case temperature Operating free-air temperature range, TA Lead temperature Junction temperature Storage temperature |
0.3 to +3.8 0.3 to +3.8 0.3 to +0.3 0.3 to +2.4 0.3 to min [3.3, (AVDD + 0.3)] +100 40 to +85 +260 +105 65 to +150 |
V V V V V °C °C °C °C °C |
(1) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.
(2) The dc voltage applied on the input pins should not go below 0.3V. Also, the dc voltage should be limited to the lower of either 3.3V or (AVDD + 0.3V). If the input can go higher than +3.3V, then a resistor greater than or equal to 25Ω should be added in series with each of the input pins. Also, the duty cycle of the overshoot beyond +3.3V should be limited. The overshoot duty cycle can be defined either as a percentage of the time of overshoot over a clock period, or over the entire device lifetime. For a peak voltage between +3.3V and +3.5V, a duty cycle up to 10% is acceptable. For a peak voltage between +3.5V and +3.7V, the overshoot duty cycle should not exceed 1%. Any overshoot beyond +3.7V should be restricted to less than 0.1% duty cycle, and never exceed +3.9V.
The ADS5237 is a dual, high-speed, high dynamic range, 10-bit, pipelined analog-to-digital converter (ADC). This device includes a high-bandwidth sample-and-hold amplifier that gives excellent spurious performance up to and beyond the Nyquist rate. The differential nature of the sample-and-hold amplifier and ADC circuitry minimizes even-order harmonics and gives excellent common-mode noise immunity.
The ADS5237 provides for setting the full-scale range of the converter without any external reference circuitry. The internal reference can be disabled, allowing low-drive, external references to be used for improved tracking in multichannel systems.
The ADS5237 provides an over-range indicator flag to indicate an input signal that exceeds the full-scale input range of the converter. This flag can be used to reduce the gain of front-end gain control circuitry. There is also an output enable pin to allow for multiplexing and testing on a printed circuit board (PCB).
The ADS5237 employs digital error correction techniques to provide excellent differential linearity for demanding imaging applications. It is available in a TQFP-64 package.