Features: ` High Speed: Data Rate: 2.5MSPS Bandwidth: 1.23MHz` Outstanding Performance: SNR: 91dB at fIN = 100kHz, −1dBFS THD: −101dB at fIN = 100kHz, −6dBFS SFDR: 103dB at fIN = 100kHz, −6dBFS` Ease-of-Use: High-Speed 3-Wire Serial Interface Directly Connects to TMS320 DSP...
ADS1602: Features: ` High Speed: Data Rate: 2.5MSPS Bandwidth: 1.23MHz` Outstanding Performance: SNR: 91dB at fIN = 100kHz, −1dBFS THD: −101dB at fIN = 100kHz, −6dBFS SFDR: 103dB at fIN = 1...
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ADS1271 | UNIT | |
AVDD to AGND | −0.3 to +6.0 | V |
DVDD to DGND | −0.3 to +3.6 | V |
AGND to DGND | −0.3 to +0.3 | V |
Input Current | 100, momentary | mA |
Input Current | 10, continuous | mA |
Analog input voltage to GND | −0.3 to VDD + 0.3 | V |
Digital input voltage to GND | −0.3 to VDD + 0.3 | V |
Maximum Junction Temperature | +150 | °C |
Operating Temperature Range | -40 to +85 | °C |
Storage Temperature Range | -65 to +150 | °C |
Lead Temperature (soldering, 10s) | +300 | °C |
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The ADS1602 is a high-speed, high-precision, delta-sigma analog-to-digital converter (ADC) manufactured on an advanced CMOS process. It oversampling topology reduces clock jitter sensitivity during the sampling of high-frequency, large amplitude signals by a factor of four over that achieved by Nyquist-rate ADCs. Consequently, signal-to-noise ratio (SNR) is particularly improved. Total harmonic distortion (THD) is −101dB, and the spurious-free dynamic range (SFDR) is 103dB.
Optimized for power and performance, the ADS1602 dissipates only 530mW while providing a full-scale differential input range of ±3V. Having such a wide input range makes out-of-range signals unlikely. The OTR pin indicates if an analog input out-of-range condition does occur. The differential input signal is measured against the differential reference, which can be generated internally or supplied externally on the ADS1602.
The ADS1602 uses an inherently stable advanced modulator with an on-chip decimation filter. The filter stop band extends to 38.6MHz, which greatly simplifies the anti-aliasing circuitry. The modulator samples the input signal up to 40MSPS, depending on fCLK, while the 16x decimation filter uses a series of four half-band FIR filter stages to provide 75dB of stop band attenuation and 0.001dB of passband ripple.
Output data is provided over a simple 3-wire serial interface at rates up to 2.5MSPS, with a −3dB bandwidth of 1.23MHz. The output data or its complementary format directly connects to DSPs such as TI's TMS320 family, FPGAs, or ASICs. A dedicated synchronization pin enables simultaneous sampling with multiple ADS1602s in multi-channel systems. Power dissipation is set by an external resistor that allows a reduction in dissipation when operating at slower speeds. All of the ADS1602 features are controlled by dedicated I/O pins, which simplify operation by eliminating the need for on-chip registers.