ADC14C105

Supply Voltage (V_A, V_DR)... −0.3V to 4.2V
Voltage on Any Pin
(Not to exceed 4.2V)...−0.3V to (VA +0.3V)
Input Current at Any Pin other
than Supply Pins (Note 4).......±5 mA
Package Input Current (Note 4) ...±50 mA
Max Junction Temp (T_J) ........ +150
Thermal Resistance (_JA) .......30/W
ESD Rating
Human Body Model (Note 6)..... 2500V
Machine Model (Note 6)........ 250V
Storage Temperature.... −65 to +150

Soldering process must comply with National Semiconductor's Reflow Temperature Profile specifications. Refer to www.national.com/packaging.

The ADC14C105 is a high-performance CMOS analog-todigital converter capable of converting analog input signals into 14-bit digital words at rates up to 105 Mega Samples Per Second (MSPS). This converter ADC14C105 uses a differential, pipelined architecture with digital error correction and an on-chip sample- and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a fullpower bandwidth of 1 GHz. The ADC14C105 may be operated from a single +3.0V or +3.3V power supply and consumes low power.

A separate +2.5V supply may be used for the digital output interface which allows lower power operation with reduced noise. A power-down feature reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. The differential inputs accept a 2V full scale differential input swing. A stable 1.2V internal voltage reference is provided, or the ADC14C105 can be operated with an external 1.2V reference. Output data format (offset binary versus 2's complement) and duty cycle stabilizer are pin-selectable. The duty cycle stabilizer maintains performance over a wide range of clock duty cycles.

The ADC14C105 is available in a 32-lead LLP package and operates over the industrial temperature range of −40°C to +85°C.