Features: 1.1 GHz Full Power Bandwidth Internal sample-and-hold circuit Low power consumption Internal precision 1.0V reference Single-ended or Differential clock modes Data Ready output clock Clock Duty Cycle Stabilizer Dual +3.3V and +1.8V supply operation (+/- 10%) Power-down mode Offset binar...
ADC14155: Features: 1.1 GHz Full Power Bandwidth Internal sample-and-hold circuit Low power consumption Internal precision 1.0V reference Single-ended or Differential clock modes Data Ready output clock Cloc...
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Resolution | 14 bits |
Channels | 1 Channels |
SNR | 71.3 dB |
SFDR | 87 dB |
ENOB | 11.5 bits |
Max Sample Rate | 155 MSPS |
Min Sample Rate | 5 MSPS |
Power Dissipation | 0.967 Watt |
PowerWise Rating 1 | 2.15 pJ/conv |
INL (+/-) | 1.9 LSB |
SINAD | 71 dB |
DNL (+/-) | 0.5 LSB |
THD dB | -83 dB |
Min Supply Voltage | 3 Volt |
Max Supply Voltage | 3.6 Volt |
Nominal Vin | 2 Vpp |
Temperature Min | -40 deg C |
Temperature Max | 85 deg C |
Data Converter Type | ADC |
PowerWise | Yes |
View Using Catalog |
Supply Voltage (VA, VD) Supply Voltage (VDR) |VAVD| Voltage on Any Input Pin (Not to exceed 4.2V) Voltage on Any Output Pin (Not to exceed 2.35V) Input Current at Any Pin other than Supply Pins (Note 3) Package Input Current (Note3) Max Junction Temp (TJ) Thermal Resistance (JA) Package Dissipation at TA = 25° C (Note 4) ESD Rating Human Body Model (Note 5) Machine Model (Note 5) Storage Temperature |
−0.3V to 4.2V −0.3V to 2.35V 100 mV −0.3V to (VA +0.3V) -0.3V to (VDR +0.2V) ±5 mA ±50 mA +150 24/W 5.2W 2500V 250V −65 to +150 |
The ADC14155 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 14-bit digital words at rates up to 155 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample- and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a fullpower bandwidth of 1.1 GHz. The ADC14155 operates from dual +3.3V and +1.8V power supplies and consumes 967 mW of power at 155 MSPS.
The separate +1.8V supply for the digital output interface allows lower power operation with reduced noise. A powerdown feature reduces the power consumption to 5 mW with the clock input disabled, while still allowing fast wake-up time to full operation.
The differential inputs provide a full scale differential input swing equal to 2 times the reference voltage. A stable 1.0V internal voltage reference is provided, or the ADC14155 can be operated with an external reference.
The ADC14155 can be configured for either single-ended or differential operation. Clock mode (differential versus singleended) and output data format (offset binary versus 2's complement) are pin-selectable. A duty cycle stabilizer maintains performance over a wide range of clock duty cycles.
The ADC14155 is available in a 48-lead LLP package and operates over the industrial temperature range of −40 to +85