Features: 1.1 GHz Full Power Bandwidth Internal sample-and-hold circuit Low power consumption Internal precision 1.0V reference Single-ended or Differential clock modes Clock Duty Cycle Stabilizer Dual +3.3V and +1.8V supply operation (+/- 10%) Power-down and Sleep modes Offset binary or 2's comp...
ADC12C170: Features: 1.1 GHz Full Power Bandwidth Internal sample-and-hold circuit Low power consumption Internal precision 1.0V reference Single-ended or Differential clock modes Clock Duty Cycle Stabilizer ...
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Supply Voltage (VA, VD) Supply Voltage (VDR) |VAVD| Voltage on Any Input Pin (Not to exceed 4.2V) Voltage on Any Output Pin (Not to exceed 2.35V) Input Current at Any Pin other than Supply Pins (Note 3) Package Input Current (Note 3) Max Junction Temp (TJ) Thermal Resistance (JA) Package Dissipation at TA = 25° C (Note 4) ESD Rating Human Body Model (Note 5) Machine Model (Note 5) Charge Device Model Storage Temperature |
−0.3V to 4.2V −0.3V to 2.35V 100 mV −0.3V to (VA +0.3V) −0.3V to (VDR +0.2V) ±5 mA ±50 mA +150 24/W 5.2W 2000 V 200 V 1000 V −65 to +150 |
Resolution | 12 bits |
Channels | 1 Channels |
SNR | 67.2 dB |
SFDR | 85.4 dB |
ENOB | 10.8 bits |
Max Sample Rate | 170 MSPS |
Power Dissipation | 0.715 Watt |
PowerWise Rating 1 | 2.36 pJ/conv |
INL (+/-) | 0.9 LSB |
SINAD | 67.1 dB |
DNL (+/-) | 0.5 LSB |
THD dB | -82.6 dB |
Min Supply Voltage | 3 Volt |
Max Supply Voltage | 3.6 Volt |
Nominal Vin | 2 Vpp |
Temperature Min | -40 deg C |
Temperature Max | 85 deg C |
Data Converter Type | ADC |
PowerWise | Yes |
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The ADC12C170 is a high-performance CMOS analog-todigital converter capable of converting analog input signals into 12-Bit digital words at rates up to 170 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample- and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a fullpower bandwidth of 1.1 GHz. The ADC12C170 operates from dual +3.3V and +1.8V power supplies and consumes 715 mW of power at 170 MSPS.
The separate +1.8V supply for the digital output interface allows lower power operation with reduced noise. A powerdown feature reduces the power consumption to 5 mW while still allowing fast wake-up time to full operation. In addition there is a sleep feature which consumes 50 mW of power and has a faster wake-up time.
The differential inputs provide a full scale differential input swing equal to 2 times the reference voltage. A stable 1.0V internal voltage reference is provided, or the ADC12C170 can be operated with an external reference.
Clock mode (differential versus single-ended) and output data format (offset binary versus 2's complement) are pin-selectable. A duty cycle stabilizer maintains performance over a wide range of input clock duty cycles.
The ADC12C170 is pin compatible with the ADC14155.
ADC12C170 is available in a 48-lead LLP package and operates over the industrial temperature range of −40 to +85.