Features: SNR = 54 dB with 99 MHz Analog Input
500 MHz Analog Bandwidth
On-Chip Reference and Track/Hold
1.5 V p-p Differential Analog Input Range
5.0 V and 3.3 V Supply Operation
3.3 V CMOS/TTL Outputs
Power: 2.1 W Typical at 210 MSPS
Demultiplexed Outputs Each at 105 MSPS
Output Data Format Option
Data Sync Input and Data Clock Output Provided
Interleaved or Parallel Data Output Option
ApplicationCommunications and Radar
Local Multipoint Distribution Service (LMDS)
High-End Imaging Systems and Projectors
Cable Reverse Path
Point-to-Point Radio Link
Pinout
Specifications
| Resolution (Bits) |
10bit |
| T-Put Rate |
210MSPS |
| # Chan |
1 |
| Supply V |
Multi(+3.3, +5) |
| Pwr Diss |
2.4W |
| Interface |
Par |
| Ain Range |
1.5 V p-p |
| SNR (dB) |
55dB |
| Pkg Type |
QFP |
| Parameter |
Temp |
Test
Level |
Min Typ Max |
Unit |
| RESOLUTION |
|
|
10 |
Bits |
DC ACCURACY
No Missing Codes1
Differential Nonlinearity
Integral Nonlinearity
Gain Error
Gain Tempco |
Full
25°C
Full
25°C
Full
25°C
Full |
IV
I
VI
I
VI
I
V |
Guaranteed
1.0 ±0.5 +1.25
1.0 +1.5
2.5 ±1.65 +2.5
3.0 +3.0
6.0 0 +6.0
130 |
LSB
LSB
LSB
LSB
% FS
ppm/°C |
ANALOG INPUT
Input Voltage Range (With Respect to AIN)
Common-Mode Voltage
Input Offset Voltage
Reference Voltage
Reference Tempco
Input Resistance
Input Capacitance
Analog Bandwidth, Full Power |
Full
Full
25°C
Full
Full
Full
Full
25°C
25°C |
V
V
I
VI
VI
V
VI
V
V |
±768
3.0
15 +3 +15
20 +20
2.4 2.5 2.6
50
610 875 1250
3
500 |
mV p-p
V
mV
mV
V
ppm/°C
pF
MHz |
POWER SUPPLY
Power Dissipation AC2
Power Dissipation DC3
IVCC3
IVD3
Power Supply Rejection Ratio PSRR |
25°C
Full
Full
Full
25°C |
V
VI
VI
VI
I |
2.1
2.0 2.4
128 145
401 480
7.5 +0.5 +7.5 |
W
W
mA
mA
mV/V |
DescriptionThe AD9410 is a 10-bit monolithic sampling analog-to-digital converter with an on-chip track-and-hold circuit and is opti-mized for high-speed conversion and ease of use. The product
operates at a 210 MSPS conversion rate, with outstanding dynamic performance over its full operating range.
The ADC AD9410 requires a 5.0 V and 3.3 V power supply and up to a 210 MHz differential clock input for full performance operation. No external reference or driver components are required for many applications. The digital outputs are TTL/CMOS-compatible, and separate output power supply pins also support interfacing with 3.3 V logic.
The clock input of AD9410 is differential and TTL/CMOS-compatible. The 10-bit digital outputs can be operated from 3.3 V (2.5 V to 3.6 V) supplies. Two output buses support demultiplexed data up to
105 MSPS rates, and binary or two's complement output coding format is available. A data sync function is provided for timing-dependent applications. An output clock simplifies interfacing to external logic. The output data bus timing is selectable for parallel or interleaved mode, allowing for flexibility in latching output data. Fabricated on an advanced BiCMOS process, the AD9410 is available in an 80-lead surface-mount plastic package (PowerQuad(R)2) specified over the industrial temperature range (40°C to +85°C).
AD9410 Data Sheet
