Features: 1.8 V analog supply operation1.8 V to 3.3 V output supplySNR = 71.7 dBc (72.7 dBFS) to 70 MHz inputSFDR = 85 dBc to 70 MHz inputLow power: 395 mW @ 125 MSPSDifferential input with 650 MHz bandwidthOn-chip voltage reference and sample-and-hold amplifierDNL = ±0.4 LSBFlexible analog input:...
AD9246: Features: 1.8 V analog supply operation1.8 V to 3.3 V output supplySNR = 71.7 dBc (72.7 dBFS) to 70 MHz inputSFDR = 85 dBc to 70 MHz inputLow power: 395 mW @ 125 MSPSDifferential input with 650 MHz ...
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Parameter | Rating |
ELECTRICAL AVDD to AGND DRVDD to DRGND AGND to DRGND AVDD to DRVDD D0 through D11 to DRGND DCO to DRGND OR to DRGND CLK+ to AGND CLK− to AGND VIN+ to AGND VIN− to AGND VREF to AGND SENSE to AGND REFT to AGND REFB to AGND SDIO/DCS to DRGND PDWN to AGND CSB to AGND SCLK/DFS to AGND OEB to AGND |
−0.3 V to +2.0 V −0.3 V to +3.9 V −0.3 V to +0.3 V −3.9 V to +2.0 V −0.3 V to DRVDD + 0.3 V −0.3 V to DRVDD + 0.3 V −0.3 V to DRVDD + 0.3 V −0.3 V to +3.9 V −0.3 V to +3.9 V −0.3 V to AVDD + 1.3 V −0.3 V to AVDD + 1.3 V −0.3 V to AVDD + 0.2 V −0.3 V to AVDD + 0.2 V −0.3 V to AVDD + 0.2 V −0.3 V to AVDD + 0.2 V −0.3 V to DRVDD + 0.3 V −0.3 V to +3.9 V −0.3 V to +3.9 V −0.3 V to +3.9 V −0.3 V to +3.9 V |
ENVIRONMENTAL |
65°C to +125°C 40°C to +85°C 300°C 150°C |
Resolution (Bits) | 14bit |
T-Put Rate | 125MSPS |
# Chan | 1 |
Supply V | Multi(+1.8Anlg, +1.8Dig) |
Pwr Diss | 458mW |
Interface | Par |
Ain Range | (2Vref) p-p,1 V p-p,2 V p-p |
SNR (dB) | 71.9dB |
Pkg Type | CSP |
The AD9246 is a monolithic, single 1.8 V supply, 14-bit, 80 MSPS/ 105 MSPS/125 MSPS analog-to-digital converter (ADC), featuring a high performance sample-and-hold amplifier (SHA) and on-chip voltage reference. The product uses a multistage differential pipeline architecture with output error correction logic to provide 14-bit accuracy at 125 MSPS data rates and guarantees no missing codes over the full operating temperature range.
The wide bandwidth, truly differential SHA allows a variety of user-selectable input ranges and offsets, including single-ended applications. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate. Combined with power and cost savings over previously available ADCs, the AD9246 is suitable for applications in communications, imaging, and medical ultrasound.
A differential clock input controls all internal conversion cycles. A duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance
The digital output data is presented in offset binary, Gray code, or twos complement formats. A data output clock (DCO) is provided to ensure proper latch timing with receiving logic.
The AD9246 is available in a 48-lead LFCSP_VQ and is specified over the industrial temperature range (−40°C to +85°C).