AD9230-11 Selling Leads, Price trend, AD9230-11 DataSheet download, circuit diagram from SeekIC.com

Features: SNR = 62.5 dBFS @ fIN up to 70 MHz @ 200 MSPSENOB of 10.2 @ fIN up to 70 MHz @ 200 MSPS (−1.0 dBFS)SFDR = −77 dBc @ fIN up to 70 MHz @ 200 MSPS (−1.0 dBFS)Excellent linearity DNL = ±0.15 LSB typical INL = ±0.5 LSB typicalLVDS at 200 MSPS (ANSI-644 levels)700 MHz full po...

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SeekIC No. : 004272916 Detail

AD9230-11: Features: SNR = 62.5 dBFS @ fIN up to 70 MHz @ 200 MSPSENOB of 10.2 @ fIN up to 70 MHz @ 200 MSPS (−1.0 dBFS)SFDR = −77 dBc @ fIN up to 70 MHz @ 200 MSPS (−1.0 dBFS)Excellent linea...

AD9230-11 Data Sheet

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Part Number:: AD9230-11
Supply Ability:: 5000

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1~5000

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Product Details

Description

Features:

SNR = 62.5 dBFS @ fIN up to 70 MHz @ 200 MSPS
ENOB of 10.2 @ fIN up to 70 MHz @ 200 MSPS (−1.0 dBFS)
SFDR = −77 dBc @ fIN up to 70 MHz @ 200 MSPS (−1.0 dBFS)
Excellent linearity DNL = ±0.15 LSB typical INL = ±0.5 LSB typical
LVDS at 200 MSPS (ANSI-644 levels)
700 MHz full power analog bandwidth
On-chip reference, no external decoupling required
Integrated input buffer and track-and-hold amplifier
Low power dissipation 373 mW @ 200 MSPS (LVDS SDR mode) 328 mW @ 200 MSPS (LVDS DDR mode)
Programmable input voltage range 1.0 V to 1.5 V, 1.25 V nominal
1.8 V analog and digital supply operation
Selectable output data format (offset binary, twos complement, gray code)
Clock duty cycle stabilizer
Integrated data capture clock

Application

Wireless and wired broadband communications
Cable reverse path
Communications test equipment
Radar and satellite subsystems
Power amplifier linearization

Pinout

AD9230-11 Diagram

Specifications

Resolution (Bits)	11bit
T-Put Rate	200MSPS
# Chan	1
Supply V	Multi(+1.8Anlg, +1.8Dig),Single(+1.8)
Pwr Diss	400mW

Interface	LVDS,Par
Ain Range	1.25 V p-p
SNR (dB)	62.9dB
Pkg Type	CSP

Parameter	Rating
Electrical
AVDD to AGND	−0.3 V to +2.0 V
DRVDD to DRGND	−0.3 V to +2.0 V
AGND to DRGND	−0.3 V to +0.3 V
AVDD to DRVDD	−2.0 V to +2.0 V
D0+/D0− through D10+/D10−	−0.3 V to DRVDD + 0.3 V
to DRGND
DCO+/DCO− to DRGND	−0.3 V to DRVDD + 0.3 V
OR+/OR− to DGND	−0.3 V to DRVDD + 0.3 V
CLK+ to AGND	−0.3 V to +3.9 V
CLK− to AGND	−0.3 V to +3.9 V
VIN+ to AGND	−0.3 V to AVDD + 0.2 V
VIN− to AGND	−0.3 V to AVDD + 0.2 V
SDIO/DCS to DGND	−0.3 V to DRVDD + 0.3 V
PWDN to AGND	−0.3 V to +3.9 V
CSB to AGND	−0.3 V to +3.9 V
SCLK/DFS to AGND	−0.3 V to +3.9 V
Environmental
Storage Temperature Range	−65 to +125
Operating Temperature Range	−40 to +85
Lead Temperature (Soldering, 10 sec)	300
Junction Temperature	150

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Description

The AD9230-11 is an 11-bit monolithic sampling analog-to-digital converter (ADC) optimized for high performance, low ower, and ease of use. The product operates at up to a 200 MSPS conversion rate and is optimized for outstanding ynamic performance in wideband carrier and broadband systems. All necessary functions, including a track-and-hold (T/H) amplifier and voltage reference, are included on the chip to provide a complete signal conversion solution.

The ADC requires a 1.8 V analog voltage supply and a differential clock for full performance operation. The digital outputs are LVDS (ANSI-644) compatible and support twos complement, offset binary format, or Gray code. A data clock output is available for proper output data timing.

Fabricated on an advanced CMOS process, the AD9230-11 is available in a 56-lead lead frame chip scale package, specified over the industrial temperature range (−40 to +85).

AD9230-11

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