Features: Signal-to-Noise Ratio: 69 dB @ fIN= 31 MHzSpurious-Free Dynamic Range: 85 dB @ fIN= 31 MHzIntermodulation Distortion of 75 dBFS @ fIN= 140 MHzENOB = 11.1 @ fIN= 10 MHzLow-Power Dissipation: 475 mWNo Missing Codes GuaranteedDifferential Nonlinearity Error: Specifications Pin Name Wi...
AD9226: Features: Signal-to-Noise Ratio: 69 dB @ fIN= 31 MHzSpurious-Free Dynamic Range: 85 dB @ fIN= 31 MHzIntermodulation Distortion of 75 dBFS @ fIN= 140 MHzENOB = 11.1 @ fIN= 10 MHzLow-Power Dissipation...
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Pin Name | With Respect to |
Min Max | Unit |
AVDD OEB2 Junction Temperature |
AVSS DRVSS DRVSS DRVDD AVSS AVSS DRVSS AVSS AVSS AVSS AVSS DRVSS AVSS AVSS |
0.3 +6.5 0.3 +6.5 0.3 +0.3 6.5 +6.5 0.3 +0.3 0.3 AVDD + 0.3 0.3 DRVDD + 0.3 0.3 AVDD + 0.3 0.3 AVDD + 0.3 0.3 AVDD + 0.3 0.3 AVDD + 0.3 0.3 DRVDD + 0.3 0.3 AVDD + 0.3 0.3 AVDD + 0.3 150 65 +150 300 |
V V V V V V V V V V V V V V °C °C °C |
Resolution (Bits) | 12bit |
T-Put Rate | 65MSPS |
# Chan | 1 |
Supply V | Single(+5) |
Pwr Diss | 500mW |
Interface | Par |
Ain Range | (Vref) p-p,1 V p-p,2 V p-p,Uni (Vref),Uni 1.0V,Uni 2.0V |
SNR (dB) | 68.9dB |
Pkg Type | QFP,SOP |
The AD9226 is a monolithic, single-supply, 12-bit, 65 MSPS analog-to-digital converter with an on-chip, high-performance sample-and-hold amplifier and voltage reference. The AD9226 uses a multistage differential pipelined architecture with a pat- ented input stage and output error correction logic to provide 12-bit accuracy at 65 MSPS data rates. There are no missing codes over the full operating temperature range (guaranteed).
The input of the AD9226 allows for easy interfacing to both imaging and communications systems. With a truly differential input structure, the user can select a variety of input ranges and offsets including single-ended applications.
The sample-and-hold amplifier (SHA) is well suited for IF undersampling schemes such as in single-channel communi-cation applications with input frequencies up to and wellbeyond Nyquist frequencies.The AD9226 has an on-board programmable reference. For sys- tem design flexibility, an external reference can also be chosen.A single clock input is used to control all internal conversion cycles. An out-of-range signal indicates an overflow condition that can be used with the most significant bit to determine low or high overflow.
The AD9226 has two important mode functions. One will set the data format to binary or two's complement. The second will make the ADC immune to clock duty cycle variations.