Features: Four ADCs in one package Serial LVDS (ANSI-644 ,IEEE 1596.3 reduced range link) Data and frame clock outputs SNR = 61 dB (to Nyquist) Excellent linearity DNL = +0.3 LSB (typical) INL = +0.5 LSB (typical) 400 MHz full power analog bandwidth 112 mW ADC power per channel at 65 MSPS 2 Vp-p ...
AD9219: Features: Four ADCs in one package Serial LVDS (ANSI-644 ,IEEE 1596.3 reduced range link) Data and frame clock outputs SNR = 61 dB (to Nyquist) Excellent linearity DNL = +0.3 LSB (typical) INL = +0...
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Parameter | With Respect To |
Min | Max | Unit |
ELECTRICAL | ||||
AVDD | AGND |
0.3 |
+ TBD | V |
DRVDD |
DRGND | 0.3 |
+ TBD | V |
AGND |
DRGND | 0.3 |
-0.3 | V |
DRGND | DRVDD | -0.3 | + TBD | V |
Digital Outputs (D+, D, DCO+, DCO,FCO+, FCO ) |
DRGND | 0.3 |
DRVDD + 0.3 |
V |
CLK+, CLK |
AGND | 0.3 |
AVDD + 0.3 |
V |
VIN+, VIN |
AGND | 0.3 |
AVDD + 0.3 |
V |
PDWN, CSB, SCLK/DTP, SDIO/ODM |
AGND | 0.3 |
AVDD + 0.3 |
V |
REFT, REFB, RBIAS |
AGND | 0.3 |
AVDD + 0.3 |
V |
VREF, SENSE |
AGND | 0.3 |
AVDD + 0.3 |
V |
ENVIRONMENTAL | ||||
Operating Temperature Range (Ambient) |
40 | +85 | °C | |
Maximum Junction Temperature |
150 | °C | ||
Lead Temperature (Soldering, 10 sec) |
TBD | °C | ||
Maximum Case Temperature |
TBD | °C | ||
Storage Temperature Range (Ambient) |
TBD | TBD | °C | |
Thermal Impedance1 | TBD | °C/W |
The AD9219 is a quad 10-bit, 65 MSPS analog-to-digital converter (ADC) with an on-chip track-and-hold circuit that is designed for low cost, low power, small size, and ease of use. The product operates up to a 65 MSPS conversion rate and is optimized for outstanding dynamic performance and low power where a small package size is critical.
The ADC AD9219 requires a single 1.8 V power supply and a LVPECL/CMOS/LVDS compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications
The ADC AD9219 automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock (DCO) for capturing data on the output and a frame clock (FCO) trigger for signaling a new output byte are provided. Individual channel power down is supported and typically consumes less than 3 mW when all channels are enabled.
The ADC AD9219 contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudo-random patterns, along with custom, user-defined test patterns entered via the serial port interface (SPI).
The AD9219 is available in a Pb Free, 48-LFCSP. It is specified over the industrial temperature range of 40°C to +85°C.