DescriptionThe AD9204 is a monolithic, dual-channel, 1.8 V supply, 10-bit,20 MSPS/40 MSPS/65 MSPS/80 MSPS analog-to-digital converter(ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference.The product uses multistage differential pipeline architecture with outpu...
AD9204: DescriptionThe AD9204 is a monolithic, dual-channel, 1.8 V supply, 10-bit,20 MSPS/40 MSPS/65 MSPS/80 MSPS analog-to-digital converter(ADC). It features a high performance sample-and-hold circuit and...
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The AD9204 is a monolithic, dual-channel, 1.8 V supply, 10-bit,20 MSPS/40 MSPS/65 MSPS/80 MSPS analog-to-digital converter(ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference.The product uses multistage differential pipeline architecture with output error correction logic to provide 10-bit accuracy at 80 MSPS data rates and to guarantee no missing codes over the full operating temperature range.
Features of the AD9204 are:(1)1.8 V analog supply operation; (2)1.8 V to 3.3 V output supply; (3)differential input with 700 MHz bandwidth; (4)on-chip voltage reference and sample-and-hold circuit; (5)scalable analog input: 1 V p-p to 2 V p-p differential; (6)offset binary, gray code, or twos complement data format; (7)optional clock duty cycle stabilizer; (8)integer 1-to-8 input clock divider; (9)built-in selectable digital test pattern generation; (10)energy-saving power-down modes; (11)data clock out with programmable clock and data alignment.A differential clock input controls all internal conversion cycles.An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.
The absolute maximum ratings of the AD9204 can be summarized as:(1)AVDD to AGND:-0.3 V to +2.0 V;(2)storage temperature range:-65 to +150;(3)DRVDD to AGND:-0.3 V to +3.9 V;(4)junction temperature:+150;(5)SYNC to AGND:-0.3 V to DRVDD + 0.3 V;(6)VCM to AGND:-0.3 V to AVDD + 0.2 V.Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied.Exposure to absolute maximum rating conditions for extended periods may affect device reliability.The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation.The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).