AD8304

Supply Voltage V_P V_N  . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V
Input Current  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  20 mA
Internal Power Dissipation  . . . . . . . . . . . . . . . . . . . . 270 mW

@_JA  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  150°C/W
Maximum Junction Temperature  . . . . . . . . . . . . . . . .  125°C
Operating Temperature Range  . . . . . . . . . . . 40°C to +85°C
Storage Temperature Range  . . . . . . . . . . . . 65°C to +150°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . .  300°C

The AD8304 is a monolithic logarithmic detector optimized for the measurement of low frequency signal power in fiber optic systems. It uses an advanced translinear technique to provide an exceptionally large dynamic range in a versatile and easily used form. Its wide measurement range and accuracy are achieved using proprietary design techniques and precise laser trimming.In most applications only a single positive supply, V_P,of 5 V will be required, but 3.0 V to 5.5 V can be used, and certain applications benefit from the added use of a negative supply, V_N. When using low supply voltages, the log slope is readily
ltered to fit the available span. The low quiescent current and hip disable features facilitate use in battery-operated applications.

The input current, I_PD, flows in the collector of an optimally scaled NPN transistor AD8304, connected in a feedback path around a low offset JFET amplifier. The current-summing input node operates at a constant voltage, independent of current, with a default value of 0.5 V; this may be adjusted over a wide range, including ground or below, using an optional negative supply. An adaptive biasing scheme is provided for reducing the dark current at very low light input levels.  The voltage at Pin VPDB applies approximately 0.1 V across the diode for I_{PD = 100} P^A, rising linearly with current to 2.0 V of net bias at I_PD = 10 mA The input pin INPT is flanked by the guard pins VSUM that track the voltage at the summing node to minimize leakage.

The default value of the logarithmic slope at the output VLOG is accurately scaled to 10 mV/dB (200 mV/decade). The resistance at this output is laser-trimmed to 5 k?, allowing the slope to be lowered by shunting it with an external resistance; the addition of a capacitor at this pin provides a simple low-pass filter. The intermediate voltage VLOG is buffered in an output stage that can swing to within about 100 mV of ground (or  V_N) and the posi tive supply, V_P,and provides a peak current drive capacity of ±20 mA.  The slope can be increased using the buffer and a pair of external feedback resistors. An accurate voltage reference of 2V is also provided to facilitate the repositioning of the intercept.

Many operational modes are possible. For example, low-pass filters of up to three poles may be implemented, to reduce the output noise at low input currents. The buffer may also serve as a comparator, with or without hysteresis, using the 2 V reference, for example, in alarm applications. The incremental bandwidth of a translinear logarithmic amplifier inherently diminishes for small input currents. At the 1 nA level, the AD8304's bandwidth is about 2 kHz, but this increases in proportion to IPD up to a maximum value of 10 MHz.

The AD8304 is available in a 14-lead TSSOP package and specified for operation from 40°C to +85°C.