Features: `Port level 2:1 mux/1:2 demux`Each port consists of 4 lanes`Each lane runs from dc to 3.2 Gbps, independent of the other lanes`Compensates over 40 inches of FR4 at 3.2 Gbps through two levels of input equalization, or four levels of output pre-emphasis`Accepts ac- or dc-coupled different...
AD8159: Features: `Port level 2:1 mux/1:2 demux`Each port consists of 4 lanes`Each lane runs from dc to 3.2 Gbps, independent of the other lanes`Compensates over 40 inches of FR4 at 3.2 Gbps through two lev...
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Type | 4 x 2:1/1:2 Mux-deMux |
Voltage Supply Level | PECL |
Supply Current | 320mA |
Prop Delay (ps) | 600ps |
Output Rise/Fall (ps) | 100ps |
Control Interface | LVCMOS/LVTTL Parallel |
Parameter | Rating |
VCC to VEE | 3.7 V |
VTTI | VCC + 0.6 V |
VTTIO | VCC + 0.6 V |
VTTO | VCC + 0.6 V |
VTTOI | VCC + 0.6 V |
Internal Power Dissipation | 4.26 W |
Differential Input Voltage | 2.0 V |
Logic Input Voltage | VEE − 0.3 V < VIN < VCC + 0.6 V |
Storage Temperature Range | −65 to +125 |
Lead Temperature | 300 |
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
The AD8159 is an asynchronous, protocol agnostic, quad-lane 2:1 switch with a total of 12 differential PECL/CML-compatible inputs and 12 differential CML outputs. The operation of this product is optimized for NRZ signaling with data rates up to 3.2 Gbps per lane. Each lane offers two levels of input equalization and four levels of output pre-emphasis.
The AD8159 consists of four multiplexers and four demulti-plexers, one per lane. Each port is a 4-lane link, and each lane runs up to a 3.2 Gbps data rate independent of the other lanes. The lanes are switched independently using the four select pins, SEL[3:0]; each select pin controls one lane of the port. The AD8159 has low latency and very low lane-to-lane skew.
The main application of the AD8159 is to support redundancy on both the backplane side and the line interface side of a serial link. The device has unicast and bicast capability, so it is configurable to support either 1 + 1 or 1:1 redundancy.
The AD8159 supports reversing the output and input pins on one of its ports, which helps to connect two ASICs with opposite pinouts.
The AD8159 is also used for testing high speed serial links by duplicating incoming data and sending it to the destination port and to test equipment simultaneously.