Features: 22-Bit Sigma-Delta ADCDynamic Range of 105 dB (146 Hz Input)0.003% Integral NonlinearityOn-Chip Low-Pass Digital FilterCutoff Programmable from 584 Hz to 36.5 HzLinear Phase ResponseFive Line Serial I/OTwos Complement CodingEasy Interface to DSPs and MicrocomputersSoftware Control of Fil...
AD7716: Features: 22-Bit Sigma-Delta ADCDynamic Range of 105 dB (146 Hz Input)0.003% Integral NonlinearityOn-Chip Low-Pass Digital FilterCutoff Programmable from 584 Hz to 36.5 HzLinear Phase ResponseFive L...
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Resolution (Bits) | 22bit |
T-Put Rate | 2.2kSPS |
# Chan | 4 |
Supply V | Dual(+5, -5),Multi(±5, +5 logic) |
Pwr Diss | 50mW |
Interface | Ser |
Ain Range | Bip 2.5V |
SNR (dB) | 108dB |
Pkg Type | LCC,QFP |
The AD7716 is a signal processing block for data acquisition systems. It is capable of processing four channels with band-widths of up to 584 Hz. Resolution is 22 bits and the usable dynamic range varies from 111 dB with an input bandwidth of 36.5 Hz to 99 dB with an input bandwidth of 584 Hz.
The device AD7716 consists of four separate A/D converter channels that are implemented using sigma-delta technology. Sigma-delta ADCs include on-chip digital filtering and, thus, the system filtering requirements are eased.
Three address pins program the device address. This allows a data acquisition system with up to 32 channels to be set up in a simple fashion. The output word from the device contains 32 bits of data. One bit is determined by the state of the DIN1 in-put and may be used, for example, in an ECG system with an external pacemaker detect circuit to indicate that the output word is invalid because of the presence of a pacemaker pulse.
There are 22 bits of data corresponding to the analog input.Two bits contain the channel address and 3 bits are the device address. Thus, each channel in a 32-channel system would have a discrete 5-bit address. The device also has a CASCOUT pin and a CASCIN pin that allow simple networking of multiple devices.
The on-chip control register is programmed using the SCLK,SDATA and TFS pins. Three bits of the Control Register set the digital filter cutoff frequency for the device. Selectable fre-quencies are 584 Hz, 292 Hz, 146 Hz, 73 Hz and 36.5 Hz. A further 2 bits appear as outputs DOUT1 and DOUT2 and can be used for controlling calibration at the front end. The device is available in a 44-pin PQFP (Plastic Quad Flatpack) and 44-pin PLCC.