Features: `Fast throughput rate: 1 MSPS`Specified for VDD of 3 V and 5 V`Low power at max throughput rate4 mW max at 1 MSPS with 3 V supplies9.25 mW max at 1 MSPS with 5 V supplies`Fully differential analog input`Wide input bandwidth70 dB SINAD at 100 kHz input frequency`Flexible power/serial cloc...
AD7450A: Features: `Fast throughput rate: 1 MSPS`Specified for VDD of 3 V and 5 V`Low power at max throughput rate4 mW max at 1 MSPS with 3 V supplies9.25 mW max at 1 MSPS with 5 V supplies`Fully differentia...
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Resolution (Bits) | 12bit |
T-Put Rate | 1MSPS |
# Chan | 1 |
Supply V | Single(+3),Single(+5) |
Pwr Diss | 9mW |
Interface | Ser |
Ain Range | (2Vref) p-p |
SNR (dB) | n/a |
Pkg Type | SOP,SOT |
The AD7440/AD7450A1 are 10-bit and 12-bit high speed, low power, successive approximation (SAR) analog-to-digital converters with a fully differential analog input. These parts operate from a single 3 V or 5 V power supply and use advanced design techniques to achieve very low power dissipation at throughput rates up to 1 MSPS. The SAR architecture of these parts ensures that there are no pipeline delays.
The parts AD7440/AD7450A contain a low noise, wide bandwidth, differential track-and-hold amplifier (T/H) that can handle input requencies up to 3.5 MHz. The reference voltage is applied externally to the VREF pin and can be varied from 100 mV to 3.5 V depending on the power supply and what suits the application. The value of the reference voltage etermines the common-mode voltage range of the part. With this truly differential input structure and variable eference input, the user can select a variety of input ranges and bias points.
The conversion process and data acquisition of AD7440/AD7450A are controlled usingCS and the serial clock, allowing the device to interface with microprocessors or DSPs. The input signals are sampled on the falling edge of CS; the conversion is also initiated at this point. The SAR architecture of these parts ensures that there are no pipeline delays. The AD7440 and the AD7450A use ad-vanced design techniques to achieve very low power dissipation at high throughput rates.