AD7278

Features:

Fast Throughput Rate: 3MSPS
Specified for V_DD of 2.35V to 3.6V
Low Power:
13.5 mW max at 3MSPS with 3V Supplies
TBD mW typ at 1.5MSPS with 3V Supplies
Wide Input Bandwidth:
70dB SNR at 1MHz Input Frequency
Flexible Power/Serial Clock Speed Management
No Pipeline Delays
High Speed Serial Interface
SPI^TM QSPI^TM MICROWIRE^TM DSP Compatible
Power Down Mode: 1µA max
6-Lead TSOT Package
8-lead MSOP Package
AD7476 and AD7476A pin compatible




Application

Battery-Powered Systems
Personal Digital Assistants
Medical Instruments
Mobile Communications
Instrumentation and Control Systems
Data Acquisition Systems
High-Speed Modems
Optical Sensors




Pinout








Specifications



V_DD to GND...................................... -0.3 V to TBD V
Analog Input Voltage to GND..... 0.3 V to V_DD+ 0.3 V
Digital Input Voltage to GND..............0.3 V to TBD V
Digital Output Voltage to GND... 0.3 V to V_DD+ 0.3 V
Input Current to Any Pin Except Supplies²........±10 mA

Operating Temperature Range
Commercial (B Grade)......................40°C to +85°C
Storage Temperature Range...........65°C to +150°C
Junction Temperature.........................................150°C


6-lead TSOT Package
_JAThermal Impedance.................................. TBD°C/W
_JC Thermal Impedance............................... TBD°C/W


8-lead MSOP Package
_JAThermal Impedance.................................205.9°C/W
_JCThermal Impedance............................... 43.74°C/W


Lead Temperature Soldering
Reflow (10- 30 sec) ................................... +TBD°C
ESD................................................................. TBD KV






Description

The AD7276/AD7277/AD7278 are 12-bit, 10-bit and 8bit, high speed, low power, successive-approximation ADCs respectively. The parts operate from a single 2.35V to 3.6 V power supply and feature throughput rates up to 3 MSPS. The parts contain a low-noise, wide bandwidth track/hold amplifier which can handle input frequencies in excess of TBD MHz.

The conversion process and data acquisition are controlled using CS and the serial clock, allowing the devices to interface with microprocessors or DSPs. The input signal is sampled on the falling edge of CS and the conversion is also initiated at this point. There are no pipeline delays associated with the part.

The AD7276/AD7277/AD7278 use advanced design techniques to achieve very low power dissipation at high throughput rates.

The reference for the part is taken internally from V_DD. This allows the widest dynamic input range to the ADC. Thus the analog input range for the part is 0 to V_DD. The conversion rate is determined by the SCLK.