AD684*

Features: Four Matched Sample-and-Hold AmplifiersIndependent Inputs, Outputs and Control Pins500 ns Hold Mode Settling1 ms Maximum Acquisition Time to 0.01%Low Droop Rate: 0.01 V/sInternal Hold Capacitors75 ps Maximum Aperture JitterLow Power Dissipation: 430 mW0.3 Skinny DIP PackageMIL-STD-883 C...

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AD684* Picture
SeekIC No. : 004269809 Detail

AD684*: Features: Four Matched Sample-and-Hold AmplifiersIndependent Inputs, Outputs and Control Pins500 ns Hold Mode Settling1 ms Maximum Acquisition Time to 0.01%Low Droop Rate: 0.01 V/sInternal Hold Capa...

floor Price/Ceiling Price

Part Number:
AD684*
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/3/12

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Product Details

Description



Features:

Four Matched Sample-and-Hold Amplifiers
Independent Inputs, Outputs and Control Pins
500 ns Hold Mode Settling
1 ms Maximum Acquisition Time to 0.01%
Low Droop Rate: 0.01 V/s
Internal Hold Capacitors
75 ps Maximum Aperture Jitter
Low Power Dissipation: 430 mW
0.3" Skinny DIP Package
MIL-STD-883 Compliant Versions Available



Pinout

  Connection Diagram


Specifications

Spec

with
Respect to

Min Max Unit
VCC
VEE
Control Inputs
Analog Inputs
Output Short Circuit to
Ground, VCC or VEE Indefinite
Max Junction
Temperature
Storage
Lead Temperature
(10 sec max)
Power Dissipation
Common
Common
Common
Common

Indefinite
-0.3
-15
-0.5
-12

-65

+15
+0.3
+7
+12



 

+175
+150
+300
640

V
V
V
V

 

 

°C
° C

°C
mW




Description

The AD684 is a monolithic quad sample-and-hold amplifier (SHA). It features four complete sampling channels, each controlled by an independent hold command. Each SHA is complete with an internal hold capacitor. The high accuracy SHA channels are self-contained and require no external components or adjustments. The AD684 is manufactured on a BiMOS process which provides a merger of high performance bipolar circuitry and low power CMOS logic.

The AD684 is ideal for high performance, multichannel data acquisition systems. Each SHA channel can acquire a signal in less than 1 ms and retain the held value with a droop rate of less than 0.01 mV/ms. Excellent linearity and ac performance make the AD684 an ideal front end for high speed 12- and 14-bit ADCs.

The AD684 has a self-correcting architecture that minimizes hold mode errors and insures accuracy over temperature. Each channel of the AD684 is capable of sourcing 5 mA and incorporates output short circuit protection.

The AD684 is specified for three temperature ranges. The J grade device is specified for operation from 0 to +70°C, the A grade from 40°C to +85°C and the S grade from  55°C to +125°C.




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