AD6650

Digital VGA
I & Q Demodulators
Active Low Pass Filters
Dual Wideband ADC
Programmable Decimation and Channel Filters
Phase Locked Loop Circuitry
Serial Data Output Ports
IF Frequencies 70-300MHz
10 dB Noise Figure
+24 dBm Input IP2
-13 dBm Input IP3
3.3 Volt I/O and CMOS Core
I2C and Microprocessor Interface
JTAG Boundary Scan

GSM/EDGE Single Carrier and Diversity Receivers Micro and Pico Cell Systems Wireless Local Loop Smart Antenna Systems Software Radios In Building Wireless Telephony

The AD6650 is a diversity, IF to baseband receiver for GSM/EDGE. This narrow band receiver consists of an integrated DVGA, IF-to-baseband I&Q demodulators, lowpass filtering, and a dual wideband ADC. The chip can accommodate IF input frequencies from 70 MHz to 300 MHz. This receiver architecture is designed such that only one external SAW filter(one or main and one for diversity) is required in the entire Rx signal path to meet GSM/EDGE blocking requirements.

Digital decimation and filtering circuitry is embedded on chip to generate serial output I&Q data streams. The decimating filters AD6650 remove unwanted signals and noise outside the channel of interest. In addition, programmable RAM Coefficient filters allow anti-aliasing, matched filtering, and static equalization functions to be combined in a single, costeffective filter.

The AD6650 is part of a complete GSM/EDGE receive and transmit chipset. Other components in this chipset are: RF to IF amplifier/mixers, receive and transmit frequency hopping synthesizers, and a baseband to IF transmit modulator and ramping chip.