AD6634

Features: 80 MSPS Wideband Inputs (14 Linear Bits Plus ThreeRSSI)Processes Two WCDMA Channels (UMTS or CDMA20001) or Four GSM/EDGE, IS136 ChannelsFour Independent Digital Receivers in a Single PackageDual 16-Bit Parallel Output PortsDual 8-Bit Link PortsProgrammable Digital AGC Loops with 96 dB Ra...

product image

AD6634 Picture
SeekIC No. : 004269722 Detail

AD6634: Features: 80 MSPS Wideband Inputs (14 Linear Bits Plus ThreeRSSI)Processes Two WCDMA Channels (UMTS or CDMA20001) or Four GSM/EDGE, IS136 ChannelsFour Independent Digital Receivers in a Single Packa...

floor Price/Ceiling Price

Part Number:
AD6634
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2024/12/21

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Features:

80 MSPS Wideband Inputs (14 Linear Bits Plus Three
RSSI)
Processes Two WCDMA Channels (UMTS or CDMA2000
1) or Four GSM/EDGE, IS136 Channels
Four Independent Digital Receivers in a Single Package
Dual 16-Bit Parallel Output Ports
Dual 8-Bit Link Ports
Programmable Digital AGC Loops with 96 dB Range
Digital Resampling for Noninteger Decimation Rates
Programmable Decimating FIR Filters
Interpolating Half-Band Filters
Programmable Attenuator Control for Clip Prevention
and External Gain Ranging via Level Indicator
Flexible Control for Multicarrier and Phased Array
3.3 V I/O, 2.5 V CMOS Core
User Configurable Built-In Self-Test (BIST) Capability
JTAG Boundary Scan



Application

Multicarrier, Multimode Digital Receivers
     GSM, IS136, EDGE, PHS, IS95, UMTS, CDMA2000
Micro and Pico Cell Systems, Software Radios
Wireless Local Loop
Smart Antenna Systems
In Building Wireless Telephony



Pinout

  Connection Diagram


Specifications

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.6 V
Input Voltage . . . . . . . . . . . .  0.3 V to +5.3 V (5 V Tolerant)
Output Voltage Swing  . . . . . . . . . .  0.3 V to VDDIO +0.3 V
Load Capacitance  . . . . . . . . . . . . . . . . . . . . . . . . . . . .  200 pF
Junction Temperature Under Bias . . . . . . . . . . . . . . . . . 125°C
Storage Temperature Range  . . . . . . . . . . . . 65°C to +150°C
Lead Temperature (5 sec)  . . . . . . . . . . . . . . . . . . . . . .  280°C



Description

The AD6634 is a multimode 4-channel digital receive signal processor (RSP) capable of processing up to two WCDMA channels Each channel consists of four cascaded signal processing elements: a frequency translator, two fixed coefficient decimating filters, and a programmable coefficient decimating filter. Each input por has input level threshold detection circuitry and an AGC controller for accommodating large dynamic ranges or situations where gain ranging converters are used. Dual 16-bit parallel output ports accommodate high data rate WBCDMA applications. On-chip interpolating half-band can also be used to further increase the output rate. In addition, each parallel output port has a digital AGC for output data scaling. Link port outputs are provided to enable glueless interfaces to ADI's TigerSHARC(R)  DSP core.

The AD6634 is part of Analog Devices' SoftCell(R)  Multicarrier transceiver chipset designed for compatibility with Analog Devices' family of high sample rate IF sampling ADCs (AD9238/AD6645 12- and 14-bit). The SoftCell receiver comprises a digital receiver capable of digitizing an entire spectrum of carriers and digitally selecting the carrier of interest for tuning and channel selection. This architecture eliminates redundant radios in wireless base
station applications.
High dynamic range decimation filters offer a wide range of decimation rates. The RAM-based architecture allows easy reconfiguration for multimode applications.
The decimating filters remove unwanted signals and noise from the channel of interest. When the channel of interest occupies les bandwidth than the input signal, this rejection of out-of-band noise is called processing gain. By using large decimation factors, this processing gain can improve the SNR of the ADC by 30 dB or more. In addition, the programmable RAM coefficient filter allows antialiasing, matched filtering, and static equalization func-
tions to be combined in a single, cost-effective filter. Half-band interpolating filters at the output are used in WCDMA application to increase the output rate from 2* to 4* of the chip rate. The AD6634 is also equipped with two independent automatic gain control (AGC) loops for direct interface to a RAKE receiver.
The AD6634 is compatible with standard ADC converters such as the AD664x, AD923x, AD943x, and the AD922x families of data converters. The AD6634 is also compatible with the AD6600 diversity ADC, providing a cost and size reduction path.




Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
Cables, Wires
LED Products
Semiconductor Modules
Motors, Solenoids, Driver Boards/Modules
Batteries, Chargers, Holders
RF and RFID
View more