AD6623

Pin Compatible to the AD6622 18-Bit Parallel Digital IF Output Real or Interleaved Complex 18-Bit Bidirectional Parallel Digital IF Input/Output Allows Cascade of Chips for Additional Channels
Clipped or Wrapped Over Range Two's Complement or Offset Binary Output Four Independent Digital Transmitters in Single Package RAM Coefficient Filter (RCF) Programmable IF and Modulation for Each Channel Programmable Interpolating RAM Coefficient Filter p/4-DQPSK Differential Phase Encoder 3p/8-PSK Linear Encoder 8-PSK Linear Encoder Programmable GMSK Look-Up Table Programmable QPSK Look-Up Table All-Pass Phase Equalizer Programmable Fine Scaler Programmable Power Ramp Unit High Speed CIC Interpolating Filter Digital Resampling for Noninteger Interpolation Rates NCO Frequency Translation Spurious Performance Better than 100 dBc Separate 3-Wire Serial Data Input for Each Channel Bidirectional Serial Clocks and Frames Microprocessor Control 2.5 V CMOS Core, 3.3 V Outputs, 5 V Inputs JTAG Boundary Scan

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...... 3.6 V
nput Voltage . . . . . . . . . . . . . .  .......0.3 V to +5 V (5 V Tolerant)
Output Voltage Swing  . . . . . . . . . . ....... 0.3 V to VDDIO + 0.3 V
Load Capacitance  . . . . . . . . . . . . . . . . . . . . . . . . . . . . ......200 pF
unction Temperature Under Bias . . . . . . . . . . . . . . . . . .... .125°C
Storage Temperature Range  . . . . . . . . . . . . . 65°C to +150°C
Lead Temperature (5 sec)  . . . . . . . . . . . . . . . . . . . . . . ....  280°C

Stresses greater than those listed above may cause permanent damage to the device. These are stress ratings only; functional operation of the devices at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

The AD6623 is a 4-channel Transmit Signal Processor (TSP) that creates high bandwidth data for Transmit Digital-to-Analog Converters (TxDACs) from baseband data provided by a Digital Signal Processor (DSP). Modern TxDACs have achieved suffi- ciently high sampling rates, analog bandwidth, and dynamic range to create the first Intermediate Frequency (IF) directly. The AD6623 synthesizes multicarrier and multistandard digital signals to drive these TxDACs. The RAM-based architecture allows easy reconfiguration for multimode applications. Modulation, pulse- shaping and anti-imaging filters, static equalization, and tuning functions are combined in a single, cost-effective device. Digital IF signal processing provides repeatable manufacturing, higher accuracy, and more flexibility than comparable high dynamic range analog designs.

The AD6623 has four identical digital TSPs complete with synchro- nization circuitry and cascadable wideband channel summation. AD6623 is pin compatible to AD6622 and can operate in AD6622- compatible control register mode.

The AD6623 utilizes a 3.3 V I/O power supply and a 2.5 V core power supply. All I/O pins are 5 V tolerant. All control registers and coefficient values are programmed through a generic micro- processor interface. Intel and Motorola microprocessor bus modes are supported. All inputs and outputs are LVCMOS compatible.