AD6622

Features: ` Wideband Digital IF Parallel Output` Wideband Digital IF Parallel Input Allows Cascade of Chips for Additional Channels` Programmable IF and Modulation for Each Channel` Programmable Interpolating RAM Coefficient Filter` High-Speed CIC Interpolating Filter` NCO Frequency Translation Wo...

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AD6622 Picture
SeekIC No. : 004269708 Detail

AD6622: Features: ` Wideband Digital IF Parallel Output` Wideband Digital IF Parallel Input Allows Cascade of Chips for Additional Channels` Programmable IF and Modulation for Each Channel` Programmable Int...

floor Price/Ceiling Price

Part Number:
AD6622
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/28

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Product Details

Description



Features:

` Wideband Digital IF Parallel Output
` Wideband Digital IF Parallel Input
  Allows Cascade of Chips for Additional Channels
` Programmable IF and Modulation for Each Channel
` Programmable Interpolating RAM Coefficient Filter
` High-Speed CIC Interpolating Filter
` NCO Frequency Translation
  Worst Spur Better than 100 dBc
  Tuning Resolution Better than 0.02 Hz
  Real or Complex Outputs
` Digital Summation of Channels
  Clipped or Wrapped Overrange
  Two's Complement or Offset Binary Output
` Separate 3-Wire Serial Data Input for Each Channel
` Microprocessor Control
` JTAG Boundary Scan



Application

· Cellular/PCS Base Stations
· Micro/Pico Cell Base Stations
· WBCDMA
· Wireless Local Loop Base Stations
· Phase Array Beam Forming Antennas



Pinout

  Connection Diagram


Specifications

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +3.6 V
Input Voltage . . .  ..... 0.3 V to VDD +0.3 V (Not 5 V Tolerant)
IN[17:0], QIN, OEN
Input Voltage . . . . . . . . . . . . .. 0.3 V to +3.6 V (5 V Tolerant)
CLK, RESET, DS, R/W, MODE, A[2:0], D[7:0], SYNC, TRST,
TCK, TMS, TDI, SDINA, SDINB, SDINC, SDIND
Output Voltage Swing . . . . . . . . . . . .... 0.3 V to VDD + 0.3 V
Load Capacitance . . . . . . . . . . . . . . . . . . . . . . .. . . . . . 200 pF
Junction Temperature Under Bias . . . . . . . . . .. . . . . .  . 125°C
Storage Temperature Range . . . . . . . . . . . . 65°C to +150°C
Lead Temperature (5 sec) . . . . . . . . . . . . . . . . . . . . .. . 280°C

*Stresses greater than those listed above may cause permanent damage to the device. These are stress ratings only; functional operation of the devices at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.



Description

The AD6622 comprises four identical digital Transmit Signal Processors (TSPs) complete with synchronization circuitry and cascadable wideband channel summation. An external digitalto-analog converter (DAC) is all that is required to complete a wide band digital up-converter. On-chip tuners allow the relative phase and frequency for each RF carrier to be independently controlled.

Each TSP has three cascaded signal processing elements: a RAM-programmable Coefficient interpolating Filter (RCF), a programmable Cascaded Integrator Comb (CIC) interpolating filter, and a Numerically Controlled Oscillator/tuner (NCO). The outputs of the four TSPs are summed and scaled on-chip.

In multichannel wideband transmitters, multiple AD6622s may be combined using the chip's cascadable output summation stage. Each channel provides independent serial data inputs that may be directly connected to the serial port of DSP chips. User programmable FIR filters can be used to filter linear inputs.

All control registers and coefficient values of AD6622 are programmed through a generic microprocessor interface. Two microprocessor bus modes are supported. All inputs and outputs are LVCMOS compatible. All outputs are LVCMOS and 5 V TTL compatible.




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