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AD6472

Features: Integrated Front End for Single Pair or Two Pair HDSL SystemsMeets ETSI SpecificationsSupports 1168 Kbps and 2.32 MbpsTransmit and Receive Signal Path Functions Receive Hybrid Amplifier, PGA and ADC Transmit DAC, Filter and Differential Outputs Programmable FiltersControl and Ancillary F...

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SeekIC No. : 004269678 Detail

AD6472: Features: Integrated Front End for Single Pair or Two Pair HDSL SystemsMeets ETSI SpecificationsSupports 1168 Kbps and 2.32 MbpsTransmit and Receive Signal Path Functions Receive Hybrid Amplifier, P...

AD6472 Data Sheet

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Part Number:
AD6472
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/28

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Product Details

Description



Features:

Integrated Front End for Single Pair or Two Pair HDSL Systems
Meets ETSI Specifications
Supports 1168 Kbps and 2.32 Mbps
Transmit and Receive Signal Path Functions
  Receive Hybrid Amplifier, PGA and ADC
  Transmit DAC, Filter and Differential Outputs
  Programmable Filters
Control and Ancillary Functions
  Timing Recovery DAC
  Normal Loopback and Low Power Modes
  Simple Interface-to-Digital Transceivers
Single 5 V Power Supply
Power Consumption: 320 mW-(Excluding Driver)
Package: 80-Lead MQFP
Operating Temperature: 40 to +85


Pinout

Connection Diagram


Specifications

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . ......................................................0.3 V to +6.0 V
Input Voltage . . . . . . . . . . . . . . . . . . . . ........................................................0.5 V to VDD + 0.5 V
Output Voltage Swing . . . . . . . . . . . . . .........................................................0.5 V to VDD + 0.5 V
Operating Temperature Range (Ambient) . . . .....................................................40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . ....................................................65°C to +150°C
Lead Temperature (5 sec) MQFP . . . . . . . . . . . . . . . ..........................................................+280°C


Description

The AD6472 is a single chip analog front end for two pair or single pair HDSL applications that use 1168 Kbps or 2.32 Mbps data rates.

The AD6472 integrates all the transmit and receive functional blocks together with the timing recovery DAC.The digital interface is designed to support industry standard digital transceivers.

While providing the full analog front end for ETSI standards (two pair or single pair HDSL applications) the AD6472 supports other applications because the architecture allows for bypassing the functional blocks.

The normal, low power, and loopback modes and the digital interface combine to make the AD6472 simple to integrate into systems.




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