AD6432

Features:

Fully Compliant with Standard and Enhanced GSM
Specification
DC-350 MHz RF Bandwidths
80 dB Gain Control Range
I/Q Modulation and Demodulation
Onboard Phase Locked Tunable Oscillator
On-Chip Noise Roofing IF Filters
Ultralow Power Design
2.7 V3.6 V Operating Voltage
User-Selectable Power-Down Modes
Small 44-Lead TQFP Package
Interfaces Directly with AD20msp410 and AD20msp415
GSM Baseband Chipsets


Application

I/Q Modulated Digital Wireless Systems
GSM Mobile Radios
GSM PCMCIA Cards


Pinout




Specifications

Supply Voltage VPDV, VPPX, VPDM, VPFL, VPPC, VPRX,
to CMTX, CMRX, CMIF, CMD                . . . . . . . . . . . . . . +3.6 V
Internal Power Dissipation2 . . . . . . . . . . . . . . . . . . .  600 mW
Operating Temperature Range  . . . . . . . . . . .25°C to +85°C
Storage Temperature Range  . . . . . . . . . . . 65°C to +150°C
Lead Temperature, Soldering (60 sec)  . . . . . . . . . . . +300°C


Description

The AD6432 IF IC provides the complete transmit and receive IF signal processing, including I/Q modulation and demodulation, necessary to implement a digital wireless transceiver such as a GSM handset. The AD6432 may also be used for other wireless TDMA standards using I/Q modulation. The AD6432's receive signal path is based on the proven architecture of the AD607 and the AD6459. It consists of a mixer, gain-controlled amplifiers, integrated roofing filter and I/Q demodulators based on a PLL. The low noise, high-intercept variable-gain mixer is a doubly-balanced Gilbert-cell type. It has a nominal 13 dBm input-referred 1 dB compression point and a 0 dBm input-referred third-order intercept.

The gain-control input accepts an external control voltage input from an external AGC detector or a DAC. It provides an 80 dB gain range with 27.5 mV/dB gain scaling, where the mixer and the IF gains vary together. The I and Q demodulators provide inphase and quadrature baseband outputs to interface with Analog Devices' AD7015 and AD6421 (GSM, DCS1800, PCS1900) baseband converters. An onboard quadrature VCO, externally phase-locked to the IF signal, drives the I and Q demodulators. The quadrature phase-locked oscillator (QPLO) requires no external components for frequency control or quadrature generation, and demodulates signals at standard GSM system IFs of 13 MHz, or 26 MHz with a reference input frequency of 13 MHz; or, in
general, 1X or 2X the reference frequency. Maximum reference frequency is 25 MHz.