AD642

Features: Matched Offset VoltageMatched Offset Voltage Over TemperatureMatched Bias CurrentCrosstalk: 124 dB @ 1 kHzLow Bias Current: 35 pA max Warmed UpLow Offset Voltage: 500 mV maxLow Input Voltage Noise: 2 mV p-pHigh Open Loop GainLow Quiescent Current: 2.8 mA maxLow Total Harmonic DistortionS...

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AD642 Picture
SeekIC No. : 004269668 Detail

AD642: Features: Matched Offset VoltageMatched Offset Voltage Over TemperatureMatched Bias CurrentCrosstalk: 124 dB @ 1 kHzLow Bias Current: 35 pA max Warmed UpLow Offset Voltage: 500 mV maxLow Input Volta...

floor Price/Ceiling Price

Part Number:
AD642
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/6/9

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Product Details

Description



Features:

Matched Offset Voltage
Matched Offset Voltage Over Temperature
Matched Bias Current
Crosstalk: 124 dB @ 1 kHz
Low Bias Current: 35 pA max Warmed Up
Low Offset Voltage: 500 mV max
Low Input Voltage Noise: 2 mV p-p
High Open Loop Gain
Low Quiescent Current: 2.8 mA max
Low Total Harmonic Distortion
Standard Dual Amplifier Pin Out
Available in Hermetic Metal Can Package and Chip Form
MIL-STD-883B Processing Available
Single Version Available: AD542



Pinout

  Connection Diagram


Description

The AD642 is a pair of matched high speed monolithic BiFET operational amplifier fabricated with the most advanced bipolar, JFET and laser trimming technologies. The AD642 offers matched bias currents that are significantly lower than currently available monolithic dual FET input operational amplifiers: 35 pA max matched to 25 pA for the AD642K and L; 75 pA max, matched to 35 pA for the AD642J and S. In addition, the offset voltage is laser trimmed to less than 0.5 mV and matched to 0.25 mV for the AD642L, 1.0 mV and matched to 0.5 mV for the AD642K, utilizing Analog's laser-wafer trimming (LWT) process.

The tight matching and temperature tracking between the operational amplifiers is achieved by ion-implanted JFETs and aser-wafer trimming. Ion-implantation permits the fabrication of precision, matched JFETs on a monolithic bipolar chip. The optimizes the process to product matched bias currents which have lower initial bias currents than other popular BiFET opamps. Laser-wafer trimming each amplifier's input offset voltage assures tight initial match and combined with superior IC processing guarantees offset voltage tracking over the temperature range.


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