AD6122

Features:

Fully Compliant with IS98A and PCS Specifications
Linear IF Amplifier
    63 dB to +34 dB
    Linear-in-dB Gain Control
    Temperature-Compensated Gain Control
Quadrature Modulator
   Modulates IFs from 50 MHz to 350 MHz
Integral Low Dropout Regulator
   Accepts 2.9 V to 4.2 V Input from Battery
Low Power
   10.4 mA at Midgain<10A Sleep Mode Operation
Companion Receiver IF Chip Available (AD6121)


Application

CDMA, W-CDMA, AMPS and TACS Operation
QPSK Transmitters


Pinout




Specifications

Supply Voltage DVCC, IFVCC, TXVCC to DGND,IFGND . . . . . . . . . . . . .. +5 V
Internal Power Dissipation2 . . . . . . . . . . . . . ................................. . .. . 600 mW
Operating Temperature Range . . . . . . . ....................................... . . . 40°C to +85°C
Storage Temperature Range . . . . . . . . . . ........................................ . 65°C to +150°C
Lead Temperature Range (Soldering 60 sec) . . . . . . ........................ . +300°C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2Thermal Characteristics: 28-lead SSOP Package: _JA = 115.25°C/W.


Description

The AD6122 is a low power IF transmitter subsystem, specifically designed for CDMA applications. It consists of an I and Q modulator, a divide-by-two quadrature generator, high dynamic range IF amplifiers with voltage-controlled gain and a powerdown control input. An integral low dropout regulator allows operation from battery voltages from 2.9 V to 4.2 V.

The gain control input of AD6122 accepts an external gain control voltage input from a DAC. It provides 97 dB of gain control with a nominal 75 dB/V scale factor. Either an internal or an external reference may be used to set the gain-control scale factor.

The I and Q modulator of AD6122 accepts differential quadrature baseband inputs from a CDMA baseband converter. The local oscillator is injected at twice the IF frequency. A divide-by-two quadrature generator followed by dual polyphase filters ensures ±1° quadrature accuracy.

The modulator of AD6122 provides a common-mode reference output to bias the transmit DACs in the baseband converter to the same common-mode voltage as the modulator inputs, allowing dc coupling between the two ICs and thus eliminating the need to charge and discharge coupling capacitors. This allows the fastest power-up and power-down times for the AD6122 and CDMA baseband ICs.

The AD6122 is fabricated using a 25 GHz f_t silicon BiCMOS process and is packaged in a 28-lead SSOP and a 32-leadless LPCC chip scale package (5 mm × 5 mm).