Features: Mixer
15 dBm 1 dB Compression Point
5 dBm IP3
24 dB Conversion Gain
>500 MHz Input Bandwidth
Logarithmic/Limiting Amplifier
80 dB RSSI Range
638 Phase Stability over 80 dB Range
Low Power
21 mW at 3 V Power Consumption
CMOS-Compatible Power-Down to 300 mW typ
200 ns Enable/Disable Time
ApplicationPHS, GSM, TDMA, FM, or PM Receivers
Battery-Powered Instrumentation
Base Station RSSI Measurement
PinoutSpecificationsSupply Voltage VPS1, VPS2 . . . . . . . . . . . . . . . . . . . . . . +6 V
Internal Power Dissipation2. . . . . . . . . . . . . . . . . . . . 600 mW
Temperature Range . . . . . . . . . . . . . . . . . . . . . 40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . 65°C to +150°C
Lead Temperature (Soldering 60 sec) . . . . . . . . . . . . . +300°CDescriptionThe AD608 provides both a low power, low distortion, low noise mixer and a complete, monolithic logarithmic/limiting amplifier using a "successive-detection" technique. It provides both a high speed RSSI (Received Signal Strength Indicator) output with 80 dB dynamic range and a hard-limited output.
The RSSI output is from a two-pole post-demodulation low- pass filter and provides a loadable output voltage of +0.2 V to +1.8 V. The AD608 operates from a single 2.7 V to 5.5 V supply at a typical power level of 21 mW at 3 V.
The RF and LO bandwidths both exceed 500 MHz. In a typical IF application, the AD608 will accept the output of a 240 MHz SAW filter and downconvert it to a nominal 10.7 MHz IF with a conversion gain of 24 dB (ZIF = 165 Ω). The AD608's loga- rithmic/limiting amplifier section handles any IF from LF to as high as 30 MHz. The mixer is a doubly-balanced "Gilbert-Cell" type and operates linearly for RF inputs spanning 95 dBm to 15 dBm. It has a nominal 5 dBm third-order intercept. An onboard LO preamplifier requires only 16 dBm of LO drive. The mixer's current output drives a reverse-terminated, industry-standard 10.7 MHz 330 Ω filter.
The nominal logarithmic scaling is such that the output is +0.2 V for a sinusoidal input to the IF amplifier of 75 dBm and +1.8 V at an input of +5 dBm; over this range the logarithmic conformance is typically ±1 dB. The logarithmic slope is proportional to the supply voltage. A feedback loop automati-
cally nulls the input offset of the first stage down to the sub- microvolt level. The AD608's limiter output provides a hard-limited signal out- put at 400 mV p-p. The voltage gain of the limiting amplifier to this output is more than 100 dB. Transition times are 11 ns and the phase is stable to within ±3° at 10.7 MHz for signals from 75 dBm to +5 dBm.