Features: `Complete, dual, 12-/14-/16-bit D/A converter
`Operates from single/dual supplies
`Software programmable output range +5 V, +10 V, +10.8 V, ±5 V, ±10 V, ±10.8 V
`INL error: ±16 LSB maximum, DNL error: ±1 LSB maximum
`Total unadjusted error (TUE): 0.1% FSR maximum
`Settling time: 10 s maximum
`Integrated reference: 5 ppm/ typ.
`Integrated reference buffers
`Output control during power-up/brownout
`Simultaneous updating via LDAC
`AsynchronousCLR to zero-/mid-scale
`DSP-/microcontroller-compatible serial interface 24-lead TSSOP
`Operating temperature range: −40 to +85 iCMOS™ process technology1Application·Industrial automation
·Closed-loop servo control, process control
·Automotive test and measurement
·Programmable logic controllersPinout
SpecificationsTA = 25°C unless otherwise noted.
Transient currents of up to 100 mA do not cause SCR latch-up.
| Parameter |
Rating |
| AVDD to GND |
−0.3 V to +17 V |
| AVSS to GND |
+0.3 V to −17 V |
| DVCC to GND |
−0.3 V to +7 V |
| Digital Inputs to GND |
−0.3 V to DVCC + 0.3 V or 7 V (whichever is less) |
| Digital Outputs to GND |
−0.3 V to DVCC + 0.3 V or 7 V
(whichever is less) |
| REFIN/REFOUT to GND |
−0.3 V to +17 V |
| VOUTA, VOUTB to GND |
AVSS to AVDD |
| DAC_GND to GND |
-0.3V to +0.3V |
| SIG_GND to GND |
-0.3V to +0.3V |
Operating Temperature Range, TA
Industrial |
−40 to +85 |
| Storage Temperature Range |
−65 to +150 |
| Junction Temperature, TJ max |
105 |
24-Lead TSSOP Package
JA Thermal Impedance |
90/W |
| Power Dissipation |
(TJ max TA)/ JA |
| Lead Temperature |
JEDEC Industry Standard |
| Soldering |
J-STD-020 |
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
| Resolution (Bits) |
16bit |
| DAC Update Rate |
1.07MSPS |
| DAC Settling Time |
7.5s |
| # DAC Outputs |
2 |
| DAC Type |
Voltage Out |
| DAC Input Format |
Ser,SPI |
| Output FSR |
(Bip 10.8V),(Bip 10V),(Bip 5V),(Uni 10.8V),(Uni 10V),(Uni 5V) |
| Ref Int/Ext |
Int/Ext |
| Supply Vnom |
(+12An, +3 to +5Dig),(+15An, +3 to +5Dig),(+5An, +3 to +5Dig),(± 5An, +3 to +5Dig),(±12An, +3 to +5Dig),(±15An, +3 to +5Dig) |
| Pwr Diss |
190mW |
| Package |
SOP |
DescriptionThe AD5722R/AD5732R/AD5752R are dual, 12-/14-/16-bit, serial input, voltage output, digital-to-analog converters. They operate from single supply voltages of +4.5 V up to +16.5 V or dual supply voltages from ±4.5 V up to ±16.5 V. Nominal fullscale output range is software-selectable from the options of +5 V, +10 V, +10.8 V, ±5 V, ±10 V, or ±10.8 V. Integrated output amplifiers, reference buffers, and proprietary power-up/powerdown control circuitry are also provided.
The parts offer guaranteed monotonicity, integral nonlinearity (INL) of ±16 LSB maximum, low noise, 10 s maximum settling time, and an on-chip +2.5 V reference.
The AD5722R/AD5732R/AD5752R use a serial interface that operates at clock rates up to 30 MHz and are compatible with DSP and microcontroller interface standards. Double buffering allows the simultaneous updating of all DACs. The input coding is user-selectable twos complement or offset binary for a bipolar output (depending on the state of pin BIN/
2sComp), and straight binary for a unipolar output. The asynchronous clear function clears all DAC registers to a user-selectable zero-scale or mid-scale output. The parts are available in a 24-lead TSSOP and offer guaranteed specifications over the −40 to +85
industrial temperature range.
AD5752R Data Sheet
