Features: Complete, dual, 12-/14-/16-bit digital-to-analog converter (DAC)
Operates from single/dual supplies
Software programmable output range +5 V, +10 V, +10.8 V, ±5 V, ±10 V, ±10.8
V INL error: ±16 LSB maximum, DNL error: ±1 LSB maximum
Total unadjusted error (TUE): 0.1% FSR maximum
Settling time: 10 s typical
Integrated reference buffers
Output control during power-up/brownout
Simultaneous updating via LDAC
Asynchronous CLR
APPLICATIONS to zero scale or midscale
DSP-/microcontroller-compatible serial interface 24-lead TSSOP
Operating temperature range: −40 to +85 iCMOS process technology1
Specifications
| Resolution (Bits) |
14bit |
| DAC Settling Time |
10s |
| # DAC Outputs |
2 |
| DAC Type |
Voltage Out |
| DAC Input Format |
Ser,SPI |
| Output FSR |
(Bip 10.8V),(Bip 10V),(Bip 2Vref),(Bip 5V),(Uni 10.8V),(Uni 10V),(Uni 2Vref),(Uni 5V) |
| Ref Int/Ext |
Ext |
| Supply Vnom |
(+12An, +3 to +5Dig),(+15An, +3 to +5Dig),(+5An, +3 to +5Dig),(± 5An, +3 to +5Dig),(±12An, +3 to +5Dig),(±15An, +3 to +5Dig) |
| Pwr Diss |
190mW |
| Package |
SOP |
|
AVDD to GND
AVSS to GND
DVCC to GND
Digital Inputs to GND
Digital Outputs to GND
REFIN to GND
VOUTA or VOUTB to GND
DAC_GND to GND
SIG_GND to GND
Operating Temperature Range, TA
Industrial
Storage Temperature Range
Junction Temperature, TJ max
24-Lead TSSOP Package
JA Thermal Impedance
JC Thermal Impedance
Power Dissipation
Lead Temperature
Soldering
ESD (Human Body Model) |
−0.3 V to +17 V
+0.3 V to −17 V
−0.3 V to +7 V
−0.3 V to DVCC + 0.3 V or 7 V (whichever is less)
−0.3 V to DVCC + 0.3 V or 7 V (whichever is less)
−0.3 V to +5 V
AVSS to AVDD
−0.3 V to +0.3 V
−0.3 V to +0.3 V
−40 to +85
−65 to +150
105
42/W
9/W
(TJ max − TA)/ JA
JEDEC industry standard
J-STD-020
3.5 kV |
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DescriptionThe AD5722/AD5732/AD5752 are dual, 12-/14-/16-bit, serial input, voltage output, digital-to-analog converters. They operate from single-supply voltages from +4.5 V up to +16.5 V or dual-supply
The AD5722/AD5732/AD5752 are dual, 12-/14-/16-bit, serial input, voltage output, digital-to-analog converters. They operate from single-supply voltages from +4.5 V up to +16.5 V or dual-supply voltages from ±4.5 V up to ±16.5 V. Nominal full-scale output range is software-selectable from +5 V, +10 V, +10.8 V, ±5 V, ±10 V, or ±10.8 V.
Integrated output amplifiers, reference buffers, and proprietary power-up/power-down control circuitry are also provided. The parts offer guaranteed monotonicity, integral nonlinearity (INL) of ±16 LSB maximum, low noise, and 10 s typical settling time.
The AD5722/AD5732/AD5752 use a serial interface that operates at clock rates up to 30 MHz and are compatible with DSP and microcontroller interface standards. Double buffering allows the simultaneous updating of all DACs. The input coding is user-selectable twos complement or offset binary for a bipolar output (depending on the state of Pin BIN/2sComp The AD5722/AD5732/AD5752 are pin compatible with the ), and straight binary for a unipolar output. The asynchronous clear function clears all DAC registers to a user-selectable zero-scale or midscale output. The parts are available in a 24-lead TSSOP and offer guaranteed specifications over the −40 to +85 industrial temperature range.
The AD5724/AD5734/AD5754, which are complete, quad, 12-/14-/ 16-bit, serial input, unipolar/bipolar voltage output DACs.
AD5732 Data Sheet
