AD5554

Features:

AD5544 16-Bit Resolution
AD5554 14-Bit Resolution
2 mA Full-Scale Current 20%, with VREF = 10 V
2 s Settling Time
VSS BIAS for Zero-Scale Error Reduction @ Temp
Midscale or Zero-Scale Reset
Four Separate 4Q Multiplying Reference Inputs
SPI-Compatible 3-Wire Interface
Double Buffered Registers Enable
Simultaneous Multichannel Change
Internal Power ON Reset
Compact SSOP-28 Package




Application

Automatic Test Equipment
Instrumentation
Digitally-Controlled Calibration




Pinout








Specifications

VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V, +8 V
VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V, 7 V
VREF to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V, +18 V
Logic Inputs and Output to GND . . . . . . . . . . . . 0.3 V, +8 V
V(IOUT) to GND . . . . . . . . . . . . . . . . . . . .0.3 V, VDD + 0.3 V
AGNDX to DGND . . . . . . . . . . . . . . . . . . . . . . 0.3 V, + 0.3 V
Input Current to Any Pin Except Supplies . . . . . . . . . ±50 mA
Package Power Dissipation . . . . . . . . . . . . (TJ MAX TA)/JA
Thermal Resistance JA
28-Lead Shrink Surface-Mount (RS-28) . . . . . . . . 100°C/W
Maximum Junction Temperature (T MAX) . . . . . . . . . 150°C
Operating Temperature Range
Model A . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C to +85°C
Storage Temperature Range . . . . . . . . . . .65°C to +150°C
Lead Temperature:
RS-28 (Vapor Phase, 60 secs) . . . . . . . . . . . . . . . . . . 215°C
RS-28 (Infrared, 15 secs) . . . . . . . . . . . . . . . . . . . . . . 220°C

Description

The AD5544/AD5554 quad, 16-/14-bit, current-output, digital-to-analog converters are designed to operate from a single 5V supply.

The applied external reference input voltage (VREF) determines the full-scale output current. Integrated feedback resistors (RFB) provide temperature-tracking, full-scale voltage outputs when combined with an external I-to-V precision amplifier.

A doubled-buffered serial-data interface offers high-speed, 3-wire, SPI- and microcontroller-compatible inputs using
serial-data-in (SDI), clock (CLK), and a chip-select (CS). In addition, a serial-data-out pin (SDO) allows for daisy-chaining when multiple packages are used. A common level-sensitive load-DAC strobe (LDAC) input allows simulta neous update of all DAC outputs from previously loaded input registers. Additionally, an internal power ON reset forces the output voltage to zero at system turn ON. An MSB pin allows system reset assertion (RS) to force all registers to zero code when MSB = 0, or to half-scale code when MSB = 1.

AD5544/AD5554 are packaged in the compact SSOP-28.