AD5533

Features:

Infinite Sample-and-Hold Capability to
0.018% Accuracy
High Integration: 32-Channel SHA in 12  12 mm2 LFBGA
Per Channel Acquisition Time of 16 s max
Adjustable Voltage Output Range
Output Voltage Span 10 V
Output Impedance 0.5 
Readback Capability
DSP-/Microcontroller-Compatible Serial Interface
Parallel Interface
Temperature Range 40C to +85C


Application

Level Setting
Instrumentation
Automatic Test Equipment
Industrial Control Systems
Data Acquisition
Low Cost I/O


Pinout




Specifications

(T_A = 25°C unless otherwise noted)
V_DD to AGND  . . . . . . . . . . . . . . . .. . . . . . . . . . . .  0.3 V to +17 V
V_SS to AGND  . . . . . . . . . . . . . . . . . . . .. . . . . . . .  +0.3 V to 17 V
AV_CC to AGND, DAC_GND  . . . . . . . . . .. . .. . . . . . .  0.3 V to +7 V
DV_CC to DGND  . . . . . . . . . . . . . . . . .. . . . . . . . . . .  0.3 V to +7 V
Digital Inputs to DGND  . . . . . . .. . . .. .. . .  0.3 V to DV_CC + 0.3 V
Digital Outputs to DGND . . . . . . . . . .. .. . .  0.3 V to DV_CC + 0.3 V
REF_IN to AGND, DAC_GND  . . . . . . . . .. . . .. . . . . .  0.3 V to +7 V
V_IN to AGND, DAC_GND  . . . . . . . . . . . .. . .. . . . . . .  0.3 V to +7 V
V_OUT031 to AGND  . . . . . . . . . . . ... .  V_SS 0.3 V to V_DD + 0.3 V
V_OUT031 toVSS  . . . . . . . . . . . .. . . . . . . . . . . . .  0.3 V to +24 V
OFFS_IN to AGND  . . . . . . . . . . . .. . .. .  V_SS 0.3 V to V_DD + 0.3 V
OFFS_OUT to AGND  . . .. . . .. . . .. .   AGND 0.3 V to AV_CC + 0.3 V
AGND to DGND.  . . . . . . . . . .. . . .. . . . . . . . . . . . .  0.3 V to +0.3 V
Operating Temperature Range
     Industrial  . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  40°C to +85°C
Storage Temperature Range  . . . . . . . . . . . . .  65°C to +150°C
Junction Temperature (TJ max)  . . . . .. . . . . . . . . . . . . . . . .  150°C
74-Lead LFBGA Package, JA Thermal Impedance  . .. . . .  41°C/W
Reflow Soldering
     Peak Temperature  . . . . . . . . . . . . . . . . . . . . . . .. . . .. . . . .  220°C
     Time at Peak Temperature  . . . . . . . . . . .. . . .. .  .  10 sec to 40 sec


Description

The AD5533 combines a 32-channel voltage translation function with an infinite output hold capability. An analog input voltage on the common input pin, V_IN, is sampled and its digital repre-sentation transferred to a chosen DAC register. VOUT for this DAC is then updated to reflect the new contents of the DAC register. Channel selection is accomplished via the parallel address inputs A0A4 or via the serial input port. The output voltage range is determined by the offset voltage at the OFFS_IN pin and the gain of the output amplifier. It is restricted to a range from V_SS + 2 V to V_DD 2 V because of the headroom of the output amplifier.

The device AD5533 is operated with AVCC = 5 V ± 5%, DV_CC = 2.7 V to 5.25 V, V_SS = 4.75 V to 16.5 V and V_DD = 8 V to 16.5 V and requires a stable 3 V reference on REF_IN as well as an offset voltage on OFFS_IN.