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AD5532*

Features: High Integration: 32-Channel DAC in 12  12 mm2 LFBGAAdjustable Voltage Output RangeGuaranteed MonotonicReadback CapabilityDSP-/Microcontroller-Compatible Serial InterfaceOutput Impedance0.5 (AD5532-1, AD5532-2)500 (AD5532-3)1 k (AD5532-5)Output Voltage Span 10 V (AD5532-1, AD5532-3, A...

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SeekIC No. : 004269365 Detail

AD5532*: Features: High Integration: 32-Channel DAC in 12  12 mm2 LFBGAAdjustable Voltage Output RangeGuaranteed MonotonicReadback CapabilityDSP-/Microcontroller-Compatible Serial InterfaceOutput Impedance0...

AD5532* Data Sheet

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Part Number:
AD5532*
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

High Integration: 32-Channel DAC in 12  12 mm2 LFBGA
Adjustable Voltage Output Range
Guaranteed Monotonic
Readback Capability
DSP-/Microcontroller-Compatible Serial Interface
Output Impedance
  0.5 (AD5532-1, AD5532-2)
  500 (AD5532-3)
  1 k (AD5532-5)
Output Voltage Span
  10 V (AD5532-1, AD5532-3, AD5532-5)
  20 V (AD5532-2)
Infinite Sample-and-Hold Capability to ±0.018% Accuracy
Temperature Range 40 to +85


Application

Level Setting
Instrumentation
Automatic Test Equipment
Industrial Control Systems
Data Acquisition
Low Cost I/O


Pinout

Connection Diagram


Specifications

VDD to AGND . . . . . . . . . . . . . . . . . . . ............................................................ . . . . 0.3 V to +17 V
VSS to AGND . . . . . . . . . . . . . . . ............................................................ . . . . . . . . +0.3 V to 17 V
AVCC to AGND, DAC_GND . . . . . . . . ................................................................ . . . . 0.3 V to +7 V
DVCC to DGND . . . . . . . . . . . . . . ............................................................. . . . . . . . . 0.3 V to +7 V
Digital Inputs to DGND . . . . ............................................................. . . . . . 0.3 V to DVCC + 0.3 V
Digital Outputs to DGND . . . . . . ............................................................. . . 0.3 V to DVCC + 0.3 V
REF_IN to AGND, DAC_ GND . . . . .................................................................. . . . . . 0.3 V to +7 V
VIN to AGND, DAC_GND . . . ............................................................... . . . . . . . . . . . 0.3 V to +7 V
VOUT031 to AGND . . . . . . . . ............................................................ . VSS 0.3 V to VDD + 0.3 V
VOUT031 to VSS . . . . ....................................................... . . . . . . . . . . . . . . . . . 0.3 V to +24 V
OFFS_IN to AGND . . . . ................................................................ . . . . . VSS 0.3 V to VDD + 0.3 V
OFFS_OUT to AGND . . ................................................................... . AGND 0.3 V to AVCC + 0.3 V
AGND to DGND . . . . . . . . . . . . . ................................................................ . . . . . . 0.3 V to +0.3 V
Operating Temperature Range Industrial . . . . . . . . . . . . . . . . . . . . . . . ........ . . 40°C to +85°C
Storage Temperature Range . . . . . ..................................................... . . . . . . 65°C to +150°C
Junction Temperature (TJ max) . . . . . . . . . .......................................................... . . . . . . . . 150°C
74-Lead LFBGA Package, JA Thermal Impedance . ........................................................ . 41°C/W
Reflow Soldering
  Peak Temperature . . . . . . . . . . . . . . . . . . . ........................................................... . . . . . . 220°C
  Time at Peak Temperature . . . . . . . . ............................................................ . . . 10 sec to 40 sec


Description

The AD5532 is a 32-channel voltage-output 14-bit DAC with an additional infinite sample-and-hold mode. The selected DAC register is written to via the 3-wire serial interface and VOUT for this DAC is then updated to reflect the new contents of the DAC register. DAC selection is accomplished via address bits A0A4. The output voltage range is determined by the offset voltage at the OFFS_IN pin and the gain of the output amplifier. It is restricted to a range from VSS + 2 V to VDD 2 V because of the headroom of the output amplifier.

The device AD5532 is operated with AVCC = 5 V ± 5%, DVCC = 2.7 V to 5.25 V, VSS = 4.75 V to 16.5 V and VDD = 8 V to 16.5 V and requires a stable +3 V reference on REF_IN as well as an offset voltage on OFFS_IN.




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