Features: ·Pin-Compatible 12- and 14-Bit DACs·Serial Input, Voltage Output·Maximum Output Voltage Range of 10 V·Data Readback·3-Wire Serial Interface·Clear Function to a User-Defined Voltage·Power-Down Function·Serial Data Output for Daisy-Chaining·16-Lead TSSOP PackagesApplication·Industrial Aut...
AD5530: Features: ·Pin-Compatible 12- and 14-Bit DACs·Serial Input, Voltage Output·Maximum Output Voltage Range of 10 V·Data Readback·3-Wire Serial Interface·Clear Function to a User-Defined Voltage·Power-...
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Resolution (Bits) | 12bit |
DAC Update Rate | 50kSPS |
DAC Settling Time | 20s |
# DAC Outputs | 1 |
DAC Type | Voltage Out |
DAC Input Format | Ser,SPI |
Output FSR | (Bip 2Vref) |
Ref Int/Ext | Ext |
Supply Vnom | Dual(+12, -12),Dual(+15, -15) |
Pwr Diss | 60mW |
Package | SOP |
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V, +17 V
VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V, 17 V
Digital Inputs to GND . . . . . . . . . . . . . 0.3 V to VDD +0.3 V
SDO to GND . . . . . . . . . . . . . . . . . . . . . . . .0.3 V to +6.5 V
REFIN to REFAGND . . . . . . . . . . . . . . . . . . . . 0.3 V, +17 V
REFIN to GND . . . . . . . . . . . . . . . . VSS 0.3 V, VDD +0.3 V
REFAGND to GND . . . . . . . . . . . . . VSS 0.3 V, VDD +0.3 V
DUTGND to GND . . . . . . . . . . . . . . VSS 0.3 V, VDD +0.3 V
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . 40°C to +85°C
Storage Temperature Range . . . . . . . . . 65°C to +150°C
Maximum Junction Temperature (TJ MAX) . . . . . . . . . . 150°C
Package Power Dissipation . . . . . . . . . . . (TJ MAX TA)/JA
Thermal Impedance JA
TSSOP (RU-16) . . . . . . . . . . . . . . . . . . . . . . 150.4°C/W
Lead Temperature (Soldering 10s) . . . . . . . . . . . . .. 300°C
IR Reflow, Peak Temperature (< 20 sec) . . . . . . . . . . 235°C
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
The AD5530/AD5531 are single 12- and 14-bit (respectively) serial input, voltage output digital-to-analog converters (DAC).
AD5530/AD5531 utilize a versatile 3-wire interface that is compatible
The AD5530 and AD5531 are single 12-/14-bit serial input,voltage output DACs, respectively.
AD5530/AD5531 utilize a versatile 3-wire interface that is compatible with SPI™, QSPI™, MICROWIRE™, and DSP interface standards.Data is presented to the part in the format of a 16-bit serial word.Serial data is available on the SDO pin for daisy-chaining purposes.Data readback allows the user to read the contents of the DAC register via the SDO pin.
The DAC AD5530/AD5531 output is buffered by a gain of 2 amplifier and referenced to the potential at DUTGND.LDAC may be used to update the output of the DAC asynchronously. A power-down (PD) pin allows the DAC to be put into a low power state, and aCLR pin allows the output to be cleared to a user-defined voltage, the potential at DUTGND.
The AD5530 and AD5531 are available in 16-lead TSSOP packages.