Features: `Guaranteed monotonic`INL error: ±1 LSB max`On-chip 1.25 V/2.5 V, 10 ppm/°C reference`Temperature range: 40°C to +85°C`Rail-to-rail output amplifier`Power-down mode`Package type: 100-lead LQFP (14 mm * 14 mm)`User InterfacesParallelSerial (SPI®-/QSPI™-/MICROWIRE™-/DSP-com...
AD5383: Features: `Guaranteed monotonic`INL error: ±1 LSB max`On-chip 1.25 V/2.5 V, 10 ppm/°C reference`Temperature range: 40°C to +85°C`Rail-to-rail output amplifier`Power-down mode`Package type: 100-lead ...
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Resolution (Bits) | 12bit |
DAC Update Rate | 167kSPS |
DAC Settling Time | 6s |
# DAC Outputs | 32 |
DAC Type | Voltage Out |
DAC Input Format | Par,Ser,SPI |
Output FSR | (Uni 2.5V),(Uni 2Vref),(Uni 5V),User Def. Range/Offset |
Ref Int/Ext | Int/Ext |
Supply Vnom | Single(+3),Single(+3.3),Single(+5) |
Package | QFP |
Parameter |
Rating |
AVDD to AGND DVDD to DGND Digital Inputs to DGND SDA/SCL to DGND Digital Outputs to DGND REFIN/REFOUT to AGND AGND to DGND VOUTx to AGND Analog Inputs to AGND MON_IN Inputs to AGND MON_OUT to AGND Operating Temperature Range Commercial (B Version) Storage Temperature Range JunctionTemperature (TJ Max) 100-Lead LQFP Package JA Thermal Impedance Reflow Soldering Peak Temperature |
0.3 V to +7 V 0.3 V to +7 V 0.3 V to DVDD + 0.3 V 0.3 V to +7 V 0.3 V to DVDD + 0.3 V 0.3 V to AVDD + 0.3 V 0.3 V to +0.3 V 0.3 V to AVDD + 0.3 V 0.3 V to AVDD + 0.3 V 0.3 V to AVDD + 0.3 V 0.3 V to AVDD + 0.3 V 40°C to +85°C 65°C to +150°C 150°C 44°C/W 230°C |
The AD5383 is a complete, single-supply, 32-channel, 12-bit DAC available in a 100-lead LQFP package. All 32 channels have an on-chip output amplifier with rail-to-rail operation. The AD5383 includes a programmable internal 1.25 V/2.5 V, 10 ppm/°C reference; an on-chip channel monitor function that multiplexes the analog outputs to a common MON_OUT pin for external monitoring; and an output amplifier boost mode that allows optimization of the amplifier slew rate. The AD5383 features
• Double-buffered parallel interface with a 20 ns WR pulse width.
• SPI-/QSPI-/MICROWIRE-/DSP-compatible serial interface with interface speeds in excess of 30 MHz.
• I2C-compatible interface that supports a 400 kHz data transfer rate.
An input register followed by a DAC register provides double buffering, allowing the DAC outputs to be updated indepen-dently or simultaneously using the LDAC input.
Each channel has a programmable gain and offset adjust register that allows the user to fully calibrate any DAC channel. With boost off, power consumption is typically 0.25 mA/channel.
Table 1 and Table 2 show additional products featuring high channel count, low voltage, single-supply operation, and bipolar voltage output operation.