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ACS573MS

Features: • Devices QML Qualified in Accordance with MIL-PRF-38535• Detailed Electrical and Screening Requirements are Contained inSMD# 5962-96724 and Intersil's QM Plan• 1.25 Micron Radiation Hardened SOS CMOS• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . ....

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SeekIC No. : 004267896 Detail

ACS573MS: Features: • Devices QML Qualified in Accordance with MIL-PRF-38535• Detailed Electrical and Screening Requirements are Contained inSMD# 5962-96724 and Intersil's QM Plan• 1.25 Micr...

ACS573MS Data Sheet

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Part Number:
ACS573MS
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Devices QML Qualified in Accordance with MIL-PRF-38535
• Detailed Electrical and Screening Requirements are Contained in
SMD# 5962-96724 and Intersil's QM Plan
• 1.25 Micron Radiation Hardened SOS CMOS
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)
• Single Event Upset (SEU) Immunity: <1 x 10-10 Errors/Bit/Day(Typ)
• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm2/mg
• Dose Rate Upset . . . . . . . . . . . . . . . . >1011 RAD (Si)/s, 20ns Pulse
• Dose Rate Survivability . . . . . . . . . . . >1012 RAD (Si)/s, 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range . . . . . . . . . . . . . . . . . . -55 to +125
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current 1A at VOL, VOH
• Fast Propagation Delay . . . . . . . . . . . . . . . . 17ns (Max), 12ns (Typ)


Pinout

Connection Diagram


Description

The Intersil ACS573MS is a Radiation Hardened Octal Transparent Latch with an active low output enable. The outputs are transparent to the inputs when the latch enable (LE) is High. When the latch goes low the data is latched. The output enable controls the three-state outputs.

When the output enable pins (OE) are high the output is in a high impedance state. The latch operation is independent of the state of output enable.

The ACS573MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of a radiation hardened,high-speed, CMOS/SOS Logic family.




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