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ACS280MS

Features: • Devices QML Qualified in Accordance with MIL-PRF-38535• Detailed Electrical and Screening Requirements are Contained inSMD# 5962-96708 and Intersil' QM Plan• 1.25 Micron Radiation Hardened SOS CMOS• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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SeekIC No. : 004267886 Detail

ACS280MS: Features: • Devices QML Qualified in Accordance with MIL-PRF-38535• Detailed Electrical and Screening Requirements are Contained inSMD# 5962-96708 and Intersil' QM Plan• 1.25 Micro...

ACS280MS Data Sheet

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Part Number:
ACS280MS
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Devices QML Qualified in Accordance with MIL-PRF-38535
• Detailed Electrical and Screening Requirements are Contained in
SMD# 5962-96708 and Intersil' QM Plan
• 1.25 Micron Radiation Hardened SOS CMOS
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)
• Single Event Upset (SEU) Immunity: <1 x 10-10 Errors/Bit/Day(Typ)
• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm2/mg
• Dose Rate Upset . . . . . . . . . . . . . . . . >1011 RAD (Si)/s, 20ns Pulse
• Dose Rate Survivability . . . . . . . . . . . >1012 RAD (Si)/s, 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range . . . . . . . . . . . . . . . . . . -55 to +125
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current  1A at VOL, VOH
• Fast Propagation Delay . . . . . . . . . . . . . . . . 23ns (Max), 15ns (Typ)


Pinout

Connection Diagram


Description

The Intersil ACS280MS is a Radiation Hardened 9-bit odd/even parity generator checker device. Both odd and even parity outputs are available for generating or checking parity for words up to 9 bits long. Even parity is indicated (EVEN output high) when an even number of data inputs are high. Odd parity is indicated (ODD output high) when an odd number of data inputs are high. Parity checking for larger words can be accomplished by tying EVEN output to any input of an additional ACS280MS.

The ACS280MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of a radiation hardened,high-speed, CMOS/SOS Logic Family.

The ACS280MS is supplied in a 14 lead Ceramic Flatpack (K suffix) or a Ceramic Dual-In-Line Package (D suffix).




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