ACS109MS

• QML Qualified Per MIL-PRF-38535 Requirements
• 1.25 Micron Radiation Hardened SOS CMOS
• Radiation Environment
- Latch-Up Free Under Any Conditions
- Total Dose (Max.) . . . . . . . . . . . . . . . .3 x 10⁵ RAD(Si)
- SEU Immunity. . . . . . . . . . . .<1 x 10^-10 Errors/Bit/Day
- SEU LET Threshold . . . . . . . . . . . . >100MeV/(mg/cm²)
• Input Logic Levels. . V_IL = (0.3)(V_CC), V_IH = (0.7)(V_CC)
• Output Current . . . . . . . . . . . . . . . . . . . .±12mA (Min)
• Quiescent Supply Current . . . . . . . . . . . . . 10A (Max)
• Propagation Delay . . . . . . . . . . . . . . . . . . .25ns (Max)

The Radiation Hardened ACS109MS is a Dual J-K Flip-Flop with Set and Reset. These Flip-Flops have independent J, K, Set, Reset, and Clock inputs and Q and Q outputs. The outputs change state on the positive-going transition of the clock. Set and Reset are accomplished asynchronously by Low-level inputs. All inputs are buffered and the outputs are designed for balanced propagation delay and transition times.

The ACS109MS is fabricated on a CMOS Silicon on Sapphire (SOS) process, which provides an immunity to Single Event Latch-up and the capability of highly reliable performance in any radiation environment. These devices offer significant power reduction and faster performance when compared to ALSTTL types.