Features: MCP Features`Single power supply operation 2.7 to 3.6 volt`High Performance- Access time as fast as 70ns`Package 69-Ball TFBGA (8x11x1.4 mm)`Industrial operating temperature range: -40°C to 85°C for U; -25°C to 85°C for IFlash FeaturesARCHITECTURAL ADVANTAGES`Simultaneous Read/Write oper...
A82DL16x2T: Features: MCP Features`Single power supply operation 2.7 to 3.6 volt`High Performance- Access time as fast as 70ns`Package 69-Ball TFBGA (8x11x1.4 mm)`Industrial operating temperature range: -40°C t...
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Features: MCP Features`Single power supply operation 2.7 to 3.6 volt`High Performance- Access time...
Features: The device offers complete compatibility with the JEDEC single-power-supply Flash comman...
MCP Features
`Single power supply operation 2.7 to 3.6 volt
`High Performance
- Access time as fast as 70ns
`Package 69-Ball TFBGA (8x11x1.4 mm)
`Industrial operating temperature range: -40°C to 85°C for U; -25°C to 85°C for I
Flash Features
ARCHITECTURAL ADVANTAGES
`Simultaneous Read/Write operations
- Data can be continuously read from one bank while executing erase/program functions in other bank
- Zero latency between read and write operations
`Multiple bank architectures
- Three devices available with different bank sizes (refer to Table 2)
`Package
- 69-Ball TFBGA (8x11x1.4 mm)
`Top or bottom boot block
`Manufactured on 0.18 m process technology
- Compatible with AM42DL16x2D devices
`Compatible with JEDEC standards
- Pinout and software compatible with single-power-supply flash standard
SOFTWARE FEATURES
`Supports Common Flash Memory Interface (CFI)
`Erase Suspend/Erase Resume
- Suspends erase operations to allow programming in same bank
`Data Polling and Toggle Bit
- Provides a software method of detecting the status of program or erase cycles
`Unlock Bypass Program command
- Reduces overall programming time when issuing multiple program command sequences
HARDWARE FEATURES
`Any combination of sectors can be erased
`Ready/Busy output (RY/BY)
- Hardware method for detecting program or erase cycle completion
`Hardware reset pin (RESET)
- Hardware method of resetting the internal state machine to reading array data
`WP /ACC input pin
- Write protect ( WP ) function allows protection of two outermost boot sectors, regardless of sector protect status
- Acceleration (ACC) function accelerates program timing
`Sector protection
- Hardware method of locking a sector, either in-system or using programming equipment, to prevent any program or erase operation within that sector
- Temporary Sector Unprotect allows changing data in protected sectors in-system
LP SRAM Features
`Power supply range: 2.7V to 3.6V
`Access times: 70 ns (max.)
`Current:Very low power version: Operating: 35mA(max.)
Standby: 10uA (max.)
`Full static operation, no clock or refreshing required
`All inputs and outputs are directly TTL-compatible
`Common I/O using three-state output
`Output enable and two chips enable inputs for easy application
`Data retention voltage: 2.0V (min.)
Storage Temperature Plastic Packages. . . -65°C to + 150°C
Ambient Temperature with Power Applied. -65°C to + 125°C
Voltage with Respect to Ground
VCC_F/VCC_S (Note 1) . . . . . . . .. . . . . . . . -0.5V to +4.0V
A9, OE & RESET (Note 2) . . . . . . . . . . . . . . .-0.5V to +12.5V
WP /ACC . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +10.5V
All other pins (Note 1) . . . . . -0.5V to VCC_F/VCC_S + 0.5V
Output Short Circuit Current (Note 3) . . . . . . . .. . 200mA
Notes:
1. Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions, input or I/O pins may undershoot VSS
to -2.0V for periods of up to 20ns. Maximum DC voltage on input and I/O pins is VCC_F/VCC_F +0.5V. See Figure 7. During voltage transitions, input or I/O pins may overshoot to VCC_F/VCC_S +2.0V for periods up to 20ns. See Figure 8.
2. Minimum DC input voltage on A9, OE , RESET and WP /ACC is -0.5V. During voltage transitions, A9,OE ,WP /ACC and RESET may overshoot VSS to -2.0V for periods of up to 20ns. See Figure 7. Maximum DC input voltage on A9 is +12.5V which may overshoot to 14.0V for periods up to 20ns. Maximum DC input voltage on WP /ACC is +9.5V which may overshoot to +12.0V for period up to 20ns.
3. No more than one output is shorted to ground at a time.Duration of the short circuit should not be greater than one second.
The A82DL16x2T(U) family consists of 16 megabit, 3.0 voltonly flash memory devices, organized as 1,048,576 words of 16 bits each or 2,097,152 bytes of 8 bits each. Word mode data appears on I/O0I/O15; byte mode data appears on I/O0I/O7. The device is designed to be programmed in-system with the standard 3.0 volt VCC supply, and can also be programmed in standard EPROM programmers.The device is available with an access time of 70ns. The devices A82DL16x2T(U) are offered in 69-ball Fine-pitch BGA. Standard control pins-chip enable (CE_F ), write enable (WE ), and output enable ( OE )-control normal read and write operations, and avoid bus contention issues.
The device A82DL16x2T(U) requires only a single 3.0 volt power supply for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations.