A62S7316

Features: ·Operating voltage: 2.7V to 3.6V·Access times: 55ns (max.): for VCC = 3.0V to 3.6V 70ns (max.): for VCC = 2.7V to 3.6V·Current: A62S7316-S series: Operating: 50mA (max.) Standby: 10mA (max.) A62S7316-SI series: Operating: 50mA (max.) Standby: 15mA (max.)·Extended operating temperature ra...

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SeekIC No. : 004260472 Detail

A62S7316: Features: ·Operating voltage: 2.7V to 3.6V·Access times: 55ns (max.): for VCC = 3.0V to 3.6V 70ns (max.): for VCC = 2.7V to 3.6V·Current: A62S7316-S series: Operating: 50mA (max.) Standby: 10mA (max...

floor Price/Ceiling Price

Part Number:
A62S7316
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Features:

·Operating voltage: 2.7V to 3.6V
·Access times: 55ns (max.): for VCC = 3.0V to 3.6V
  70ns (max.): for VCC = 2.7V to 3.6V
·Current:
  A62S7316-S series: Operating: 50mA (max.)
  Standby: 10mA (max.)
  A62S7316-SI series: Operating: 50mA (max.)
  Standby: 15mA (max.)
·Extended operating temperature range : -25°C to 85°C for -SI series
·Full static operation, no clock or refreshing required
·All inputs and outputs are directly TTL-compatible
·Common I/O using three-state output
·Data retention voltage: 2V (min.)
·Available in 44-pin TSOP and 48-ball Mini BGA (6X8) packages.



Pinout

  Connection Diagram


Specifications

VCC to GND . . . . . . . . . . . . . . .  . . . . . -0.5V to +4.6V
IN, IN/OUT Volt to GND . . . . . . . . -0.5V to VCC + 0.5V
Operating Temperature, Topr . . . . . -25°C to +85°C
Storage Temperature, Tstg . . . . .. -55°C to +125°C
Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . 0.7W
Soldering Temp. & Time . . . . . . . . . . . . 260°C, 10 sec



Description

The A62S7316 is a low operating current 2,097,152-bit static random access memory organized as 131,072 words by 16 bits and operates on low power supply voltage from 2.7V to 3.6V. It is built using AMIC's high performance CMOS process.

Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

The chip enable input is provided for POWER-DOWN, device enable. Two byte enable inputs and an output enable input are included for easy interfacing.

Data retention is guaranteed at a power supply voltage as low as 2V.




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